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SiC verses GaN on 40 meter AM class D




 
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Author Topic: SiC verses GaN on 40 meter AM class D  (Read 675 times)
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VE3ELQ
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« on: October 30, 2017, 02:15:30 PM »

On my latest class D 40M AM TX project the RF deck was left to last as I wanted to experiment with different FETs. Six of the Cree 900V 11A SiC FETs with NCP81074A drivers have worked very well in 2 other TX projects on 80 and 160M and fairly well on 40M.  Four of the 900V 22A versions looked to be good also so a RF deck with these FETs was constructed and tested at 7.3MHZ. Input was 75V at carrier at about 5A providing 325W RF into a 50ohm load. Modulation peaks to 160V gave about 1450W PEP. But the efficiency was much lower than I had expected at about 90% and with 50W of heat the deck got quite hot. Though usable it would have needed a cooling fan so was considered not acceptable. Since I had 4 of the new Transform TPH3206PS GaN FETs the deck was re-built for these FETs.

Test results with the GaNs was stellar. At 75V carrier the RF O/P is 325W with an input of 4.4A, as best it could be measured, for eff of about 97%.  The deck gets barely warm with some of that heat coming from the drivers and 6V regulators. But there was one major concern.  The Drain/Source voltage rating of these FETs is 600V and with a 150V power supply already built, the drain pulses under full modulation would exceed this by about 175 volts. So initial tests limited audio drive to keep the drain pulse peaks just at 600V. What to do??  

Lowering the B+ was an obvious solution so it was dropped to 120V and with full modulation applied the pulses were right at 600V.  Carrier level was then 225W with 1025W PEP, quite usable for 40M. But the specs for GaNs are quite different than for Silicon or SiC as they do not have a body diode and will not avalanche. In fact the BV specs are very conservative based more on MTBF than actual breakdown voltage. The Transform application note 0008, linked below, explains these ratings in detail. It states "Transphorm’s GaN devices are rated for a transient peak voltage that is ~25% higher (e.g. 800V for a 650V part) than the continuous rating. This peak transient rating is significantly below voltage levels that could result in device failures." unquote. It further states that they have been tested to 1750V without failure. So given the dual ratings of continuous with a higher peak rating for not longer than 1 usec, which still includes some additional voltage headroom, and that a half sign wave at 7.3 mhz is .068 usec, well below 1 usec, it seemed reasonable to test them at a higher B+. With gritted teeth the B+ was slowly dialed up to 150V while monitoring drain pulse amplitude under full modulation. Drain peaks were then 800V, 50V higher than the 750V peak rating for this FET. The FETs performed great. OP at carrier was 324W with PEP at 1474W and nothing went bang. It was run for 15 min with an MP3 loop of Shania Twain, full of high dynamics, fully modulated about 115% with mild negative peak limiting. The deck got just slightly warm and the 1 Gal dummy load got smoking hot. It would be valuable to test a single FET running single phase with a load and see just how high Vdd can go before failure but I don't currently have a spare one, next parts order for sure this will be done.

So these TPH3206PS FETs with NCP81074A drivers are winners on 40M and would certainly do exceptionally well on 80 and 160M. The TPH3206PSB FETs with a 650/850 Voltage rating but slightly higher RdsON may be even better and I do have 4 of them. But the 900V 11A SiC FETS also do very well on the lower 2 bands so are probably a more cost effective solution for 80 and 160M.  The drivers for any FET however are critical. Driving a 4.5 nsec FET with a 25 nsec driver is a waste of a good FET. 25nsec driver + 4.5 nsec FET = 25 nsec FET = PPP and a waste of $.

Next is to get it all into a box and try it on the air.  When complete I will post all the details with full schematics of the entire transmitter. Pic of deck attached.

AN0008    
http://www.transphormusa.com/document/drain-voltage-avalanche-ratings-gan-fets/

73s  Nigel


* IMG_20171025_160839.jpg (2643.68 KB, 3264x2448 - viewed 96 times.)
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ka1tdq
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« Reply #1 on: October 31, 2017, 04:20:21 AM »

I checked DigiKey's prices and the FETs are around $11 each with the drivers at $1.40.  That's really good pricing for the drivers since IXDD614's are over $5.  For me though, I don't have the equipment or skill to build a homebrew surface mount rig. 

I've tried to build a 40 meter push-pull E RF deck using TO-220 style mount drivers, but I couldn't get it to play nice.  Understandably, the construction wasn't nearly as compact and neat as yours. 

Is there a TO-220 style mount driver that beats the IXDD614's on speed?  You know, something you can mount gobs of wire and solder to and have it still work wonders?

Jon
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VE3ELQ
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« Reply #2 on: October 31, 2017, 08:44:50 AM »


Is there a TO-220 style mount driver that beats the IXDD614's on speed?  You know, something you can mount gobs of wire and solder to and have it still work wonders?

Jon
Jon Not aware of any in TO220.  When using fast FETs and drivers the last thing you want is gobs of wire. Connections need to be low inductance as short as possible.  The best way is a surface mount PCB screwed down to the ground plane. PCBs are quite easy to make using a variety of methods, and I've tried them all. I now use Express PCB (freeware) to design the board in the PC then print it with a laser printer on Kodak glossy photo paper from wallymart then iron it onto the FR4 board copper with a modelers sealing iron at full heat.  Soak in warm water for about 1 hour then peel off the paper and gently scratch away any remaining paper between the toner traces. Touch up any nicks with a fine tip sharpie pen. Then etch in warmed up ferric chloride (about 15 min) and clean it up with lacquer thinner and steel wool. Plenty of you tube "how to" on this method. SMT components are dirt cheap and small. Once you have made your first one and got into SMT you will never go back.

You could "dead bug" the driver. Glue it upside down with a drop of CA up close to the FET and glue a .1 mfd 1206 size chip cap on the driver chip between the Vdd and Vss pins and glue a 330 ohm resistor on the input end then wire the pins with short leads. OK I guess for a quick experiment.

Keep on building.
73s  Nigel
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ka1tdq
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« Reply #3 on: October 31, 2017, 08:55:10 AM »

I've tried etching back in the day with a sharpie marker and etching with spotty results.  I do like the dead bug thing.  It seems much quicker and easier, and I'm sure it works fine.

Jon
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M0VRF
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« Reply #4 on: October 31, 2017, 02:42:23 PM »

OSHPARK, Simple as, cheap too!



* GaN Quad.jpg (153.68 KB, 815x971 - viewed 58 times.)
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W1DAN
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« Reply #5 on: October 31, 2017, 06:34:15 PM »

Hi Nigel!

Great meeting you at Near-Fest. I most enjoyed our discussion.

On your current 40m developments, I wonder some simple questions:

1. What about a higher output transformer turns ratio for more power out at a safe drain voltage?
2. What about paralleling transistors?

I assume there would be no gain in using an H-bridge arrangement?

Thanks for testing and posting your results!!

Dan
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VE3ELQ
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« Reply #6 on: October 31, 2017, 08:13:58 PM »

Hi Nigel!

Great meeting you at Near-Fest. I most enjoyed our discussion.

On your current 40m developments, I wonder some simple questions:

1. What about a higher output transformer turns ratio for more power out at a safe drain voltage?
2. What about paralleling transistors?

I assume there would be no gain in using an H-bridge arrangement?

Thanks for testing and posting your results!!

Dan

Dan nice chatting with you at NEARfest, had a great visit.

Yes adding an extra secondary turn would bump up the power and also load down the drain pulses a little and I have been considering this. The transformer bolts in so easy to make another one and swap it out. May try this soon.

And yes paralleling FETs is a great way to lower RDSon to improve efficiency. But the drain bus starts to get long with 3 or more FETs and these GaNs already have very low RDSon and I only had 4, but it is a good idea.  Also the output filter can be modified to present a lower impedance to the secondaries which has the same effect as adding a secondary turn.  Lots of options.  Would like to get it up to 400W.  I have found with other decks that keeping drain current as low as possible provides best efficiency, no drain current saturation and best overall performance. I want to run as high a B+ as I can get away with.  In this case I dont yet know how high these FETs can go but its currently working great at 150V into the modulator with about 70V at carrier. It is definitely poor design practice however.

Back about 3 years ago when I started playing with this stuff I built an H bridge RF deck.  It was challenging to get working well on 4 mhz as timing has to be perfect.  It made a nice square wave into the transformer which required some serious RF filtering. The FETs only saw the applied B+ so it had that advantage.  I much prefer the 2 phase boost converter configuration as my other D rigs and most E rigs are, it really works well.  These GaNs are new to me so probably some more experimenting to do before it gets in a box. I have some back-up 650/850 V GaNs just in case. Smiley

73s  Nigel

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W1DAN
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« Reply #7 on: November 01, 2017, 09:33:20 AM »

Hi Nigel:

Thank you for your good thoughts. We are all sitting on the sidelines watching your developments, which are very promising!

Years ago I read about H-bridge for power supply work at lower than 100Kc, and the timing had to be exact, so I can see the increased difficulty at 7MHz. OK on the low RDS on value for the current transistors, which seem to plenty low enough. I was just hoping there was a way to achieve the power level without approaching maximum transistor voltage.

When you get a chance, can you post a drain waveform image?

Thank you for reporting on your experiments. Hope to chat on 75M some weekend.

Dan
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VE3ELQ
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« Reply #8 on: November 02, 2017, 04:09:39 PM »

Dan
Lowered the input impedance of the OP LP filter and now have the deck right where I want it making 400W@carrier and about 1750 PEP. Drain pulses under full mod with B+ at 150V now a bit lower and within the FET peak specs. Its working fantastic.  Input is 70V (carrier) at 5.7A measured with my Fluke and Simpson 260 (within 1% of each other) for an input power of 399W.  The scope shows RF after LP filtering at the load at 200V peak which calculates to 400W, go figure.  This is the problem I have measuring efficiency. Suffice to say the deck barely gets warm after 15 min at full mod so eff is very high.
These FETs are incredible.

Some scope pics as requested showing both drains at 400W carrier, drain phase A and RF out on ch2, and drain A only under full mod with sweep speed slowed way down to show audio.  Multiple tries with the capture button failed to grab the highest peaks which occasionally reach 650V but you get the idea.

73s  Nigel


* DrainA-Modulated.jpg (115.45 KB, 800x480 - viewed 49 times.)

* PhaseA+OP.jpg (148.13 KB, 800x480 - viewed 56 times.)

* Drains.jpg (137.01 KB, 800x480 - viewed 57 times.)
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KQ6F
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« Reply #9 on: November 02, 2017, 06:14:53 PM »

Hi Nigel -

Beautiful-looking waveforms.  Given their peak voltages and shapes, I presume you are loading the drains with external caps (like with Class E configuration).

BTW, I ran into the same sort of efficiency measurement inconsistency.  In my case it turned out to be the resistance of my dummy load.  Instead of 50 ohms it was 58 ohms.  It also changed some with heat..

Rod
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« Reply #10 on: November 05, 2017, 03:20:51 PM »

Nice setup - good numbers.

The waveform looks VERY class E - ish.  Class E with a too-small shunt capacitor will yield the same waveform.  I've looked at class D RF waveforms in the past, and these were much more rounded, and did not peak up nearly as high relative to the DC voltage.

I know for class E, the waveform will ideally be 3.5x the DC.

The efficiency of these new FETs is very good.  I've build some rigs with both SiC and GaN devices.  At high voltages, I had some trouble taming the GaN devices, but the efficiency was high.  The modulation linearity was not as good as a standard MOSFET when using either device, but that may have been caused by other factors such as layout.  Needs more experimentation.

But, certainly very good numbers!!!
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W1DAN
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« Reply #11 on: November 06, 2017, 06:05:15 PM »

Nigel:

Thank you for the waveforms.

I heard you on the air last week but did not have the time to get on the air.

Good stuff!

Dan
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