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Author Topic: Peaburry V2 sdr kit.  (Read 18310 times)
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K3ZS
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« Reply #25 on: November 28, 2013, 05:07:43 PM »

You can increase the dynamic range of a system by oversampling and dithering even if the A/D does not have the dynamic range, this was used with radar 10 to 20 years ago when the best high speed A/D converters were 8 bits.    Usually the signal riding on noise provides a natural dithering and the higher speed of the A/D provides for the oversampling or signal integration.   When coherently integrating I and Q channels the noise is reduced by the square of the number of samples integrated.    It really works.
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N2DTS
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« Reply #26 on: December 02, 2013, 01:20:17 PM »

The Peaberry is of a design that uses a mixer to convert the RF down to audio signals (I and Q), then processes it in the computer, and outputs it to the sound card.

The A to D conversion is done in the sound card chip, and I think its fixed in how it works.

In the setups where they do the A to D conversion at RF, I think they are limited in what chips are avalable (from the cell phone world), plus if you oversample, the cpu load goes way up in whatever is doing the processing.

I wonder where the tradeoff is between a 12 bit and 16 bit samples and oversample speeds...
If you want to listen to 30 MHz and have 4 samples, it has to run at 120 MHz sample rate...or is it 240 MHz?

To add to the situation, the pipe to move data in and out of the computer is a limitation with USB, less with firewire, and likely best with gig Ethernet.






You can increase the dynamic range of a system by oversampling and dithering even if the A/D does not have the dynamic range, this was used with radar 10 to 20 years ago when the best high speed A/D converters were 8 bits.    Usually the signal riding on noise provides a natural dithering and the higher speed of the A/D provides for the oversampling or signal integration.   When coherently integrating I and Q channels the noise is reduced by the square of the number of samples integrated.    It really works.

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AB2EZ
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« Reply #27 on: December 02, 2013, 02:16:12 PM »

There is lots of room for confusion regarding the required minimum sampling rate. ["For every complex question... there is a simple answer... that is wrong"]

Generally, the minimum sampling rate needed to sample an analog signal whose frequency content is limited (by analog filters) to 0-30MHz would be 2x the highest frequency... i.e. 60M samples per second.

Therefore to "over sample" this entire 30MHz wide signal, at 4x the minimum sampling rate, you would need a 240M sample per second sampler. However, the number of bits of accuracy per sample that can be obtained, in a sampler that can operate at 240M samples per second, is less than the number of bits of accuracy per sample that can be obtained in a sampler in the same general price range, that employs the same technology (e.g. CMOS silicon integrated circuits made from transistors having a specific gate length), and which can operate at 60M samples per second.  

Alternatively, if you use digital processing techniques to extract (filter out) a slice of a 30MHz wide analog signal that is being sampled at 60M samples per second... and (for example) the slice is only 10 kHz wide... then you are (in effect) oversampling the 10 kHz slice of the total 30MHz wide signal by the ratio of 3000:1.

Some types of A/D converters (depending upon the design details) can sample at very high sampling rates, but only with a modest number of bits of accuracy per sample. Some types of A/D converters (depending upon the design details) can sample at only modest sampling rates (e.g. 48k samples per second), but with a high number of bits per sample (e.g. 24 bits per sample). Some types of A/D converter designs allow you to trade off higher sampling rates against a lower number of bits of accuracy per sample.

When using a very high sampling rate... you typically incorporate some type of high speed digital processor (e.g. a specialized digital signal processor) on the same board as the A/D converter... in order to reduce the data rate required between the board and the general purpose computer it connects to.


Note that SDRs that use analog techniques to produce a pair of bandlimited I and Q outputs... that feed a stereo sound card... are using 2 A/D converters (one for the I channel and one for the Q channel). With certain designs (but not all designs), each of the two A/D converters can operate at a sampling rate of only 1x (not 2x) the highest frequency contained in the analog I and Q signals.

Stu
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N2DTS
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« Reply #28 on: December 02, 2013, 03:49:54 PM »

Looking at the chip, it looks like there is a lot of flexability in it, and it seems like a good one...

http://www.ti.com/lit/ds/slas533b/slas533b.pdf

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w3jn
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« Reply #29 on: December 02, 2013, 04:53:09 PM »

The Afedri's max A/D bandwidth is 2 MHz; the RFSpacde SDR-IP is 1.333333MHz.  Believe the clock is 80 MSPS so the dynamic range is adequate.
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« Reply #30 on: December 04, 2013, 08:42:48 AM »


Stu,

Your post is very interesting. Thought provoking. I freely admit not enough mathematical foundation to fully work with these issues. I see the idea clearly. Makes perfect sense. Excellent explanation. One you've used before, perhaps in a class?

The idea of using a higher sample rate to create an effectively higher bit depth is interesting.
Not sure it quite works in a practical application, although I suspect that the so-called "delta-sigma" converters might be employing something along these lines.

Seems like the idea is akin to Pulse Density Modulation (PDM)?

However at least in the audio world higher sample rates and oversampling were usually employed to move the HF limit up in frequency, not to increase bit depth.

I'm wondering what the reason(s) might be that this seemingly useful and simple technique seems not to have been employed, at least in audio applications (maybe it is used in industrial applications)? And, do you have any links to papers where this technique is used, or to actual applications?

(I understand the need for the DAC to be able to function at a higher sample rate, and that this might be the sole limitation)

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W3RSW
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« Reply #31 on: December 04, 2013, 09:09:20 AM »

http://www.linear.com/product/LTC2208

The ADC in my DDC  sdR followed by an Altera Cyclone III Ep3C25 FPGA.

http://www.altera.com/devices/fpga/cyclone3/cy3-index.jsp

With a 125 MHZ clock and suitable band pass filter, This combination enables sampling of any entire  60Mhz range up through  300MHz.  

Reading the literature of these devices and similar material may help clarify some stuff.
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RICK  *W3RSW*
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« Reply #32 on: December 04, 2013, 09:14:19 AM »

Over sampling has been done in CD players since they came out I think.

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WBear2GCR
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« Reply #33 on: December 04, 2013, 01:07:03 PM »

Not since they came out, but regardless the purpose is to extend the effective bandwidth so that artifacts are out of the bandpass... not to increase the number of bits.

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« Reply #34 on: December 10, 2013, 10:37:18 PM »

I found some spec's on the Peaberry:

From the ARRL report:

Noise floor (MDS), 400 Hz DSP filter BW:
10.1 and 14.2 MHz, -115 dBm
18.1 and 21.2 MHz, -114 dBm

Gain compression, 400 Hz DSP filter BW:
14 MHz, 20/5/2 kHz offset:  105/105/105 dB
Reciprocal mixing: -105/-93/-87 dBc
Two tone, 3rd-order DR: 99/99/99

Note that this latter reading would put the Peaberry on the Sherwood list at #5, tied with the Perseus, and just below the Flex 5000A.

For $149.
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