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Author Topic: Common Gate Jfet Amp  (Read 5909 times)
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KI4YAN
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« on: June 30, 2020, 08:42:45 PM »

Working on a little project that has me trying to remember why I chose to do it this way, and see if I can get it to work properly. I was working on it last night when it was far too late, and made several mistakes. It would have worked, but not well.

After a friend looked it over and talked through it with me, I've adjusted it a bit to this-but I am trying to find the information I need to actually "work" through it instead of handwave the thing. I've basically been treating it like a grounded-grid triode and that mostly works-just doesn't give me much confidence in what I'm doing, though, that I can't bootstrap my brain into solid-state!

Anyway, the circuit in question:



The RMS-2 diode mixer on the far left is terminated by a relatively low-Q 9Mhz diplexer to get a broadband match into 50 Ohms, to reduce spurious mixer responses. Then, C11 AC couples into the source of a J310 JFET, with a 68R source-to-ground resistor to set the operating point and input impedance, which should be pretty close to 70 ohms. I'd like to bring this down to 50 if I can but honestly low noise is better than a perfect match.

R14 is the load resistor, and R11 may or may not be needed. The combination of R11 and C8 are to match into the filter-the original schematic that this filter came from had a 2n2222A emitter follower driving the 1K series resistor, 100nf cap, and 22pf cap, before the filter. *Supposedly* this filter needs a 1K in parallel with 25pF input impedance for best passband flatness and stop-band response, but others have measured 560R and 25pF, some others get the recommended 1K, etc. I figure it can't hurt too much to lift what was a functional match before.

This is the original circuit, in the left-most box:



After the filter will come the first variable-gain IF amplifier-this common gate JFET doesn't need more than 10dB of gain, and needs to prioritize low noise.

How far wrong am I, and what do I need to figure out to get this right?
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Tom WA3KLR
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« Reply #1 on: July 01, 2020, 12:39:13 PM »

The input impedance of the J310 JFET stage is not high, so it is not solely defined by the 68 Ohm resistor.  The input impedance for the common gate JFET is 1/gm.  My old and browning Siliconix databook says the input transconductance for the J310 is 12,000 microMhos (typical), varies +/-20% at least.  This is an input impedance of 83 Ohms.  If so, with the 68 Ohm resistor in parallel gives 37.5 Ohms. So the value of R15 may need to be raised. BUT depending on where you got your circuit and the bias current versus the Siliconix test current of 10 ma., the circuit may be close to 50 Ohms as is.

Your circuits remind me of the receiver articles by Ulrich Rohde in ham radio magazine in the late 1970’s and 1980’s!

I want to do a receiver project in the future using microprocessor and DDS synthesizer, need to learn C or Python since I have been solely a hardware guy.  I am wondering about the future availability of I.F. filters since the technology is going to SDR.  I guess the CB SSB rigs still are using crystal i.f. filters?

Another guy on this forum W4AMV – his QRZ website shows many solid-state transceiver & receiver projects.

Good luck with your receiver project.
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73 de Tom WA3KLR  AMI # 77   Amplitude Modulation - a force Now and for the Future!
WU2D
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CW is just a narrower version of AM


« Reply #2 on: July 01, 2020, 02:14:06 PM »

Old CBs handled the crystal filter circuit with cheap bipolars. This kind of circuit gives some gain, is degenerated H bias and flexible, and if decent RF transistors are used, pretty low noise. They ignored the reactances and out of band responses, but there is no reason that you could not add components to optimize the passband and response.
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K9MB
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« Reply #3 on: July 01, 2020, 02:55:25 PM »

The input impedance of the J310 JFET stage is not high, so it is not solely defined by the 68 Ohm resistor.  The input impedance for the common gate JFET is 1/gm.  My old and browning Siliconix databook says the input transconductance for the J310 is 12,000 microMhos (typical).  This is an input impedance of 83 Ohms.  If so, with the 68 Ohm resistor in parallel gives 37.5 Ohms. So the value of R15 may need to be raised. BUT depending on where you got your circuit and the bias current versus the Siliconix test current of 10 ma., the circuit may be close to 50 Ohms as is.

Your circuits remind me of the receiver articles by Ulrich Rohde in ham radio magazine in the late 1970’s and 1980’s!

I want to do a receiver project in the future using microprocessor and DDS synthesizer, need to learn C or Python since I have been solely a hardware guy.  I am wondering about the future availability of I.F. filters since the technology is going to SDR.  I guess the CB SSB rigs still are using crystal i.f. filters?

Another guy on this forum W4AMV – his QRZ website shows many solid-state transceiver & receiver projects.

Good luck with your receiver project.


I built some grounded gate amps using the TO-52 metal version, the U310.
The bias resistor was 100 ohms and current was 10mA, as per Siliconix literature.
I got 10dB of gain per stage and put two in a row for my 2 meter front end. Seems like noise figure was about 2.3dB or so.
For low noise front ends, I believe that the rule of thumb I used was that gain had to be 10dB more than noise figure to not degrade overall NF. This made it necessary to put two stages together ahead of a 7dB mixer.
The main benefit for HF is that it handles a lot of signal and Noise Figure is irrelevant since external noise levels are so high at HF.
A more robust front end might be made using a modern VHF VMOS amp in the 1-5 watt range. Somebody published an article on that in the early 80s, I think. They even built active balanced mixers with those RF FETs. Of course, ring diode mixers are good too as long as you have 10-20mW of oscillator.
When the TO92 version- J310 came out I tried it but it regenerated and was useless to me. I did use them for vcos though... 😉
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W4AMV
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« Reply #4 on: July 01, 2020, 10:26:08 PM »

Hello,

Here is one approach. There are many! The diplexer is fine but you have duplicated the intention with the grounded gate FET. That is, prevent the rise in input impedance of the filter creating an increase in voltage gain of the mixer and IM distortion. An active termination with the JFET is possible, see the  Spice simulation attached. Yes, Zin of the FET is controlled by the source current, 1/gm and in parallel with the source R. I used 150 ohm and looks like S11 or the return loss is better than 20 dB, flat, 1 to 30 MHz. The S12 of the FET is small, so this is also load insensitive. A 9:1 transformer followed by a 50 ohm termination follows. You can now take and match the 50 ohm load to the filter. The circuits are separable... nice if you want to check the operation of individual stages as you progress. You can use Spice and do a noise analysis and see if the NF of this stage is acceptable. I suspect it is although there are other techniques if you have little front end gain and IF noise figure is an issue.

Alan


* Active Termination.jpg (88.34 KB, 1018x645 - viewed 413 times.)
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KI4YAN
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« Reply #5 on: July 02, 2020, 01:25:07 AM »

The reason for the diplexer is exactly that, to provide a 50 ohm match at all frequencies coming out of the mixer. The reason for needing that termination is LO reflections, which muddy everything up, both in and out of the IF band. The DDS-generated LO can give some very strong birdies without the wideband termination. (also I discovered I could back the LO off quite a lot and still get good performance up to 10M, which helps quite a bit with that problem)

I was wondering if I could optimize away the diplexer with the grounded gate amp, or even the W7AAZ quad-JFET amp. The switching scheme being used (CMOS bus switches) requires the signal be very near 50 ohms to ensure the switches are not damaged by overvoltage. At 50 ohms impedance, the switches would need to see ~1W of RF before they are damaged, but at 1Kohms...much, much less.

Of course, with the diplexer in place, we are selecting out frequencies near 9mhz to pass into the preamplifier, without the diplexer the preamp sees the entire mixer output.

Going into the filters, I have an L-match, shunt inductor and series capacitor, on the input to the filter and output of the filter, to match back to 50 ohms, and then after the filters I'm planning the first variable gain amplifier. Two variable gain amps will be inside the AGC feedback loop, plus a third variable lower gain amplifier in a feed-forward AGC loop to stabilize the input to the demodulator/transmit mixer. I have not yet decided how to acquire the AGC control voltage yet-I'll have to sample the transmit RF level, and the receive audio level, for transmit and receive mode, respectively. Just not sure yet how I'll do it.

As for the circuit, I knew that the J310 was originally to be used with 75 ohm impedances in mind for cable tv applications and that it was supposed to be easy to match over the 550Mhz wide cable TV band, so figured I could start low at 68 ohms, and bump it up until I got the cleanest mixer spectrum. It was the output impedance that I was a bit stumped over. I know the output impedance is Rdrain || Ron, so Rdrain dominates for most values of Rdrain. But, the gain also is dependant on Rdrain, plus the matching, etc I was in over my head without cracking a book.

Give me a set of plate curves and I can still figure all that with a straightedge and a pencil, I just haven't gotten my brain around the other method of design yet. I'll get there. Eventually. If I do enough of it.
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Tom WA3KLR
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« Reply #6 on: July 02, 2020, 10:16:51 AM »

In my previous post I was looking at the U310 only, I disregarded the diplexer.  The overall circuit with the diplexer AND the U310 amp - the mixer output at the filter center frequency will see a load which is R10 in parallel with the impedance of the U310 input, this is not what you want.  (Way off the intermediate frequency, the mixer will see R9 as the sole load however.) I believe the mixer output diplexer approach was expecting to be followed by a high impedance/reactive load. The U310 circuit does provide the constant impedance over a wideband range. So I think you should get rid of the diplexer.

As far as the U310 output impedance, the drain is probably 1 - 10 k output, so I think you are right that the net output impedance is mostly defined by the swamping of R14.  So if the KVG filter wants to see (spec. 500 Ohms, 30 pf.). R11 needs to be lowered.  When you get the whole thing running, you can do slow sweep response and tweek the crystal filter input and output termination R's and caps.
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73 de Tom WA3KLR  AMI # 77   Amplitude Modulation - a force Now and for the Future!
KI4YAN
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« Reply #7 on: July 03, 2020, 12:05:36 AM »

You make a good point about the usage of the diplexer. I'll leave the PCB footprint on the board (it's smaller than a dime) but just jumper it through and not place the components. If it's needed, I can always put it on, terminate the diplexer in a 100R R10, and set the input impedance of the Jfet stage to 100R. The two in parallel will still present 50R.

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W4AMV
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« Reply #8 on: July 03, 2020, 12:43:14 PM »

Here is a simple arrangement. The drain is loaded and then the drain Z is transferred to the filter to provide the termination, 1k//25 pF. The ideal transformer is included just for the simulation to look at the input return loss. The voltage gain is about 12.


* FET1.jpg (63.22 KB, 975x557 - viewed 584 times.)

* FET2.jpg (51.82 KB, 980x616 - viewed 267 times.)
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KI4YAN
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« Reply #9 on: July 03, 2020, 01:43:48 PM »

More work on this.



The section of the schematic from C11 through C34, fed from and terminated by a 50R source and load, gives very good matching (-28db or better return loss on the input from 1Mhz to 50Mhz) when built on pad-per-hole board. The pi-network is pretty critical, probably better to do a transformer coupled output to get back to 50R. As drawn here, the amplifier from C11 through C34 provides 12dB of gain, and a noise factor of 1.2dB. I don't know how to measure noise factor so I took it to the RF engineer I know and had him look at it-he did the measurements and gave the good news on the matching and noise factor. Their lab gear is much, MUCH more spendy than what I've got...and the engineer is very bored with the 315Mhz wireless thingamawhatzits that they make.

And yes, now I need to make input and output 50R. I screwed up and forgot the CMOS bus switches that are being used to switch the filters can't take the 1K impedance level. Matching to 1K before the switches would mean that on a strong signal the bus switches could see voltage that exceeds their smoke limit. They do have excellent isolation in the off state, and extremely low insertion loss in the on state up to about 100Mhz.

Don't need the diplexer for the wideband match now, so it'll go away. I don't really need it and

Now...the CMOS bus switches...Just going by other RF projects on the web who've used them, these things got 100nF DC blocker caps to keep from robbing the input bias provided by the voltage dividers. That's definitely gonna screw up the output pi-network on the amplifier, so I guess that's the next thing to work on.
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Tom WA3KLR
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« Reply #10 on: July 04, 2020, 10:12:17 AM »

Jacob,

The 3 switch biasing networks, as drawn, present a combined 167 Ohm load at the C17/C34 node.  I suggest a single divider with 10 -15 K resistors, all 3 of the analog switch i.c.’s B1 inputs tied together and a single 10 nF cap after the pi network. Then you can have individual input termination R’s ahead of each KVG filter. I am wondering though, if the pi filter network will interact adversely with the crystal filters.

I think the analog switch resistance is just low enough to be o.k.  (They have characterization up to 1 GHz.!) The schematic cuts off before the filters.  The KVG filters have internal tuned circuits on the input and outputs (expecting external 30 pf load) so there is a low resistance there (confirm with ohmmeter), need blocking caps to the filters if dc is present there.  The early large schematic does show this though.

Just curious, how are you generating the BFO frequencies for the product detector? Do you have the matching crystals for the BFO? DDS?
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73 de Tom WA3KLR  AMI # 77   Amplitude Modulation - a force Now and for the Future!
W4AMV
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« Reply #11 on: July 04, 2020, 10:42:44 AM »

Good day,

The Pi network is transferring 1 k down to 50 ohms. Is that want you want to do? Furthermore, the shunt 12 uH drain inductor will further rotate the impedance into a lower R and series capacitance value. Neither terminate the filter properly.

Alan
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KI4YAN
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« Reply #12 on: July 04, 2020, 02:42:30 PM »

Alan, Yes. Originally when I wasn't considering the filter switching, I thought I needed a 1K output impedance. Then, when I realized the switches can not handle working at that impedance, I had to change back to 50 ohms.

Tom, I read through the app notes for the switches and they do show doing exactly what you suggest-however I have taken another look through the parts bins and found a neater, "flatter" solution-An integrated SP4T RF switch. I have a small bag of these tiny parts..probably 100pcs in a bag the size of a acorn tube. It's already internally configured for a 50R input/output impedance, no DC-blocking caps needed anywhere, internally biased and all that. The only issue is that it's a 4mmx4mmm quad-flat-no lead package, so it's a smidge harder to dead-bug than the microscopic SC-70 packed individual switches. (not by much...) These also will work for switching tuned bandpass filters for each selected band on the antenna side of the first mixer, and really save a lot of digital logic and support components over using the analog switches.

Yes, there is an "L" match, configured as a shunt inductor to ground followed by a series trimmer capacitor into the filter, on all the filter inputs, and on the outputs a series trimmer followed by a shunt inductor.

I am using a Si5351 clock generator IC to create LO/Carrier oscillator, and the BFO/Transmit LO. It's not a bidirectional IF strip, it just gets switched from being a first mixer and demodulator on receive, to being a modulator and transmit mixer on transmit. The signal path runs the same-just the oscillators get reprogrammed on keying up, and the ports get switched to their respective paths.

I've tried the bidirectional IF thing and didn't care for it. This way, I can optimize the signal path for receiving to get a low-noise, linear-as-I-can-get 9Mhz IF with selectable filters for bandwidth and very controllable AGC, which just so happens to be exactly what I want for a transmit chain, too.

As to the Pi Network-I picked this out because it was simple and easy and looked like it could work...and I couldn't find my 30 gauge wire to wind the little transformer with at the time. I've found it-so if this really needs to be transformer coupled for best results I can do that. I have some BN61-2402 binocular cores that I've used for this kind of transformer before and they work well.

Now I'm making a mess of this circuit, jumping around to all the different parts and pieces-but I'll get it zeroed in. I'll try a 9:1 RF transformer instead of the pi-network tonight on the dead-bug version and see how it interacts when connected to the RF switch/filter sections. Monday evening I can go see the local RF engineer and put it on the VNA to see how things look at each stage, then sweep the circuit on the spectrum analyzer to see if there are any major spurs/anomalies to take care of before committing this to a PCB. (because these bitty SMT parts are a pain to dead-bug!)
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W4AMV
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« Reply #13 on: July 05, 2020, 03:11:36 PM »

Yes, the trifilar 9:1 should work well. Try to achieve a reactance at 9 MHz of say 4 k or larger. Material 43 or 850 perm should be suitable. Coupling is key as well proper construction to keep leakage L to a minimum. Here is a response from the amplifier as coupling coefficient is varied.


* FET3.jpg (62.05 KB, 921x567 - viewed 334 times.)

* FET4.jpg (65.14 KB, 978x612 - viewed 275 times.)
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KI4YAN
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« Reply #14 on: July 05, 2020, 08:59:02 PM »

Wound a 9:1 trifiliar transformer on a Fair-Rite 2843002402 miniature binocular core. Turns out it works ok-and is much less fussy than the pi-network. Probably needs a few more turns on it, I managed to get 3 turns through the core of all three wires. I have some 2843000202 and 28430302 cores on order. (next 2 sizes up) Should be able to get 5 turns of all three windings through them.

Next thing on the list is the variable gain amps-I'll start a new thread for those. Got the amp part of that sorted, hung on the AGC part though.
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W4AMV
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« Reply #15 on: July 05, 2020, 09:20:43 PM »

Very good. There are some excellent VGA units produced by Analog Devices. However, one approach I recently did used an obsolete video amplifier mainly because I had a drawer full stuffed with them. The VGA was accomplished by use of a PI configuration of PiN diodes. A cascade of two video amplifiers and and a pair of PI PiN diode arrays achieved over 70 dB of gain range. What was particularly nice is the input and output impedance of the IF amplifier cascade stayed constant. So the IF passband remained in perfect form and simply changed amplitude by 70+ dB.
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