Nigel's output transformer

[KQ6F]

Pat -

Yes - it's a reset signal.  Actually not required since the gates are shutting off the two-phase drive signals.

I connected it because it was "free" on the off-chance that the flip flop output might otherwise generate a small birdie in the receiver.  Could have instead shutoff the AD9835 chip but that would have required starting it up again with extra code and resultant delay.

Rodney

[YB1AHY]

Wayne, et al -

Before you give up on VMCD you might want to consider something like the attached.  I've been running this successfully for 2 years now without any hiccups.  I call it Class D/E because it combines the two circuit topologies that provides the best of both, at least in my mind.  The stray C's and the drain C's are swamped by the 1000pf shunt caps and produce Class E-like half sinusoid waveforms that are free from the usual Class D spikiness.  But instead of the series-tuned output filter commonly used in Class E (requiring large unwieldy components), the filter here is a modified Butterworth.

--snip
Rod

I made the same topology as you made, and it works well since 2007. BUT, i made a Class E Network Matching Style in front of Output Transformer.  I made a little bit circuit modification in order to avoid floating variable cap. I measure that peak Voltage is 3 times VDD, and i found 750 pF as a Shunt work well. i Attach the schematic. Transformer Winding is not reverse as Nigel did.

Agree with you, this is pseudo class D also pseudo class E

73s agus

[N4LTA]

Agus and Rod.

Thanks for everything.

Rod - I also am assuming that the filter ahead of the phase splitter is an aliasing fikter for the AD generator?

I have the PC board done for the splitter and will build it this afternoon. Hopefully making RF soon.

Pat
N4LTA