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350W 3 band Class D FET AM Transmitter




 
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Author Topic: 350W 3 band Class D FET AM Transmitter  (Read 23966 times)
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M0VRF
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« Reply #25 on: April 30, 2018, 10:43:23 AM »

Thanks John, well it's not 'my' schematic, it's Nigels.

Have attached a pic of the top of the pcb, then only connection on the bottom layer (in blue) is the 6V to the 'tune' switch.

I've used a SOIC version of the IR2110 so the pinout is different, otherwise the design is the same as the one in this post, minus the ripple null business.

Large electrolytic fitted across the VMod and GND and a small PWM VReg fiited (50V to 12V) in space to LHS. L06 is a 6V reg and Q1&2 are 2N7002's, D's are 1N4148's, C's are 0u1's.

The missing pullup to EN is external.

Let me know if it makes sense!

OK!


* MODJ_01.png (37.57 KB, 654x786 - viewed 308 times.)
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w9jsw
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« Reply #26 on: April 30, 2018, 05:52:24 PM »

Didn't you have to create a copy of his schematic in the PCB program to create the components and nets to build the PCB Gerbers? That is the schematic I am referring to. I want to compare that one with the hand drawn one.
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M0VRF
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« Reply #27 on: April 30, 2018, 06:21:51 PM »

No netlist, straight to PCB from schematic, only a handful of components. The layout is the same as the hand drawn schematic I trust, just repin the IR2110 and check thru'.

I'm hoping the thread will allow the author to comment...

J.
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w9jsw
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« Reply #28 on: April 30, 2018, 10:16:20 PM »

Ok
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KD6VXI
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« Reply #29 on: April 30, 2018, 10:26:08 PM »

What software did you use to go straight to board?

This would save me SO much time with the cnc!

--Shane
KD6VXI
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vk3alk
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« Reply #30 on: April 30, 2018, 11:53:18 PM »

Hi

Just a couple of comments...
I use half bridges all the time and Nigels design seems fine and should work as is...
Although I would change the pullup resistor to pin 11 of the IR2110 to 4.7K .....from 27K...

I would check pin 11 to make sure that it pulls to ground to enable...
Also if there is a 5 volt pulse train on pins 10 and 12 180 degrees of of phase there should be output signals....when enabled....
Just for testing wouldn't apply 160 volts to the FETs just say 15 volts or so....
Although IRFP260 will work I prefer to use IRFP250s ... half the gate capacitance and makes life all round a bit easier  Grin

Wayne
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vk3alk
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« Reply #31 on: May 01, 2018, 12:13:31 AM »

Hope you don't mind these comments...

Is the Bootstrap diode installed...?
It has to be a fast switching type like a uf4007 diode......definitely not a 1N4148  Cry

If that is not installed then the upper FET will not have enough voltage to be held in the ON state...requires 12 volts between the gate and source if you know what I mean...

Wayne

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M0VRF
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« Reply #32 on: May 01, 2018, 02:47:11 AM »

Comments welcome (Nigel!)

I use EasyPC to layout, have since the DOS days, so somewhat familiar.

Ok circuit wise, EN is pulled low, there's no circuit around it and as mentioned the pull up is external,  currently hard wired low.

Hi and low logic levels present, as is the bootstrap, the 4148 is actually fine as I'm only using 48V, I've tried 3 different diodes, nothing amiss around the top FET.

I think that covers everything.

To be clear, I have the circuit working fine but ONLY at 50% (+) carrier. If you run at 40% it will not mod upto 100% as there's a gap in the pwm stream and the peaks flatten prematurely.

Most confusing and something very simple I have overlooked?

J.
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vk3alk
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« Reply #33 on: May 01, 2018, 07:39:40 AM »

Hi John...

The bootstrap diode...what is it your using ?
I use uf4007 fast recovery diode.....

The gate resistors are they 4.7ohms and 16 ohms and not Kohms ?
If their Kohms then the gate capacitance of the FETs would not have time to charge/discharge...

The best Mark Space ratio is 60:40.....that is if you have 100volts on the upper FET drain than the carrier voltage or output voltage should be adjusted to 40volts..
In your case by the sound of it you have 48volts on the upper FET so your output should be adjusted to 20volts appox...

Can you do this ?


Wayne


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vk3alk
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« Reply #34 on: May 01, 2018, 07:54:14 AM »

The bootstrap diode is the one that goes from 12 volts to Pin 6 of the IR2110 driver IC...
Also has a 10mF although I generally use 100mF Cap with negative terminal going to Pin 5...

If there isn't 12 volts between Pins 6 and 5 then 100% modulation would be hard to obtain...
That is the upper FET could not be turned hard on and there would be no headroom available or runout of headroom during modulation positive peaks...if you get what I mean....


Wayne

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w9jsw
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« Reply #35 on: May 01, 2018, 08:31:15 AM »

I found no errors on your board layout...
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M0VRF
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« Reply #36 on: May 01, 2018, 08:33:28 AM »

The bootstrap is working and a 4148 works fine, Yes I've used the UF4007 but it's thru' hole and I've actually used a smt equiv, cant remember what now but ALL 3 diodes give the same result!

11V4 across the BS cap...

Why anyone would drive power fets with KOhms res on the gates? VERY silly, it wouldn't work at all surely?

Yes 40:60, thats what I would like to acheive, however setting 40% would ONLY allow the mod to go to 90%, setting to 30% would ONLY allow 70% full mod, you get the idea?

J.

Thanks for checking it over John BTW Smiley
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vk3alk
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« Reply #37 on: May 01, 2018, 08:59:40 AM »

OK well I will ask another silly question......
The squarewaves from Pins 1 and 7 are they at 12 volts.....?

There is a reason I'm asking because I always drive the inputs with 12 volts and apply 12 volts to pins 9 and 3..
Nigel has dropped the Vdd voltage to 5 volts by that voltage divider there....and drives the inputs at 5 volts....
Have never done this myself so just wondering what the output amplitude voltage is from pins 1 and 7.....
Just finally before I goto bed....
Do you have 48volts on the upper FET and can you adjust the MarkSpace ratio so the output is 20volts...
Just checking..... Smiley
Are the negatives OK?

Wayne


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M0VRF
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« Reply #38 on: May 01, 2018, 09:34:36 AM »

Hi Wayne, thanks for your interest too, apologies if I say question is silly but you never know what I may have done!

Yes the mark space ratio can be adjusted infinately, but if setting to 40:60 (or anything less than 50%) the the bottom of the waveform clips before the top reaches well...the top of the waveform.

So you just get a clipped sine if running less than 50%, I'm not measuring DC and inputing a 1KHz sine into the mod.

I'll check the gate drives.....

with 20V Vcc

Lo Side = 11V7 p-p

Hi Side 31V2 p-p, it's floating of course...

J.
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vk3alk
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« Reply #39 on: May 01, 2018, 07:53:54 PM »

Hi John...

OK I've got it now...
It seems as though the problem is with the negative going part of your waveform.....clipping ....
Nigel uses a 16 Ohm resistor there to prevent shoot thru....
With the IRFP260 I have used both 4.7 Ohm upper and lower without any problems .....
A 16 ohm would just give you more dead time and not contribute to the problem you have....
So I feel like you do ...the output stage is working OK... Smiley

What do we do now....it gets a little tricky...

I'm not an expert here just a guy like you mucking around....but have built a few PWM and overtime I suppose learnt things...

The problem is the LTC6992......how can you check it ...

I don't use these ICs for 2 main reasons...
I like my reference oscillator to be crystal locked and prefer triangular waveforms then sawtooth...

So I use a 4060 chip with a say 8Mhz crystal and pick off 250Khz ... then into a triangular waveform generator ...then into a comparator LM311n...

Now I can check things.....I like probing around with my CRO..
The Comparator is very important part ....everything has to be setup correctly....
Also the Mark Space control goes into the Comparator .....

Look at what I've done ... rattled on and on and on without trying to give advise of what to do next....

What I would do is check that the audio stage is not clipping at pin 1 of the LTC6992...

Will print the specs of the 6992 and have a read up on it...

Sorry for the long post...


Wayne



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vk3alk
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« Reply #40 on: May 02, 2018, 12:00:14 AM »

Hi John...

Just learnt something......
Been googling around and found this WEB site.....

https://www.nuffzedd.com/power-supplies-demystified/switching-basics/

Figure 2 ...... this might prove that the output from the 6992 is working OK.....certainly worth a try anyway and might identify or eliminate things etc:

Would leave Nigels frequency as is and disconnect the output to the driver and pin 10.....
Install the resistor and capacitor to ground and audio sweep the input to say 10Khz ..... just for a bit of fun....

Give it a try  Grin

Theres a slight change I would make to Nigels design but will comment on that later...


Wayne

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M0VRF
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« Reply #41 on: May 02, 2018, 07:13:52 AM »

Thats great info Wayne, sure I will have a look and report back.

Re gate res, I've actualy got mine the other way round, less ringing etc.

I'm building a sequencer also, has to be the same size as this pcb and theres a lot going on there too.

Delay circuit, LM3914 bargraph SWR indicator and fault O/P, 7KHz LPF, I limit etc etc, quite a busy board!

I'll have a look at the LTC O/P.

J.
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M0VRF
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« Reply #42 on: May 02, 2018, 10:38:54 AM »

OK, It's the O/P from the LTC, so if you set the carrier to less than 50% the bottom of the sine will clip.

So I'm 'presuming' the circuit doesn't actually work correctly unless fixed at 50%?

Thanks for all your input chaps.

J.
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WD5JKO
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WD5JKO


« Reply #43 on: May 02, 2018, 01:46:45 PM »

OK, It's the O/P from the LTC, so if you set the carrier to less than 50% the bottom of the sine will clip.
So I'm 'presuming' the circuit doesn't actually work correctly unless fixed at 50%?

    Perhaps the intention is to allow for the male human voice being asymmetrical such that the negative going is limited to less than 100% and the positive going has the freedom to migrate up past 100% to perhaps 120% or more. This would require proper audio phasing. The QIX low level analog circuitry has a negative peak limiter as well prior to the PWM. If you are using a phase rotator (W3AM) than perhaps it's best to set carrier to 50% since the audio will be symmetrical.

Jim
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M0VRF
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« Reply #44 on: May 02, 2018, 04:19:48 PM »

As explained you can only set the carrier to 50%, then the + & - peaks will clip symmetrically. If you set the carrier to less than 50% then the negative will clip before the positive reaches the full voltage, i.e. it doesn't work for anything other than 'normal' 50% carrier.

J.
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vk3alk
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« Reply #45 on: May 02, 2018, 06:21:51 PM »

Hi John..

When you connected the resistor and capacitor and applied audio did the output waveform show the negative clipped ?

Can you post a photo of that if possible...

Do you have Steves QIX PWM generator board ? just for testing purposes for the rest of the circuit.......


Wayne


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vk3alk
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« Reply #46 on: May 02, 2018, 10:26:49 PM »

Hi John...

I don't believe there is anything wrong with Nigels LTC6992 design...
It should work fine and I feel it hasn't been setup right....

The last thing I want to say is that his circuit is no good....
All his work is top class and he has successfully got his modulator to go well etc:... Smiley

To set the DS to 40% 400mV has to applied to the MOD input Pin 1...
Your audio sits on top and peaks cannot exceed 1 volt otherwise the DS exceeds 100%.....

The LTC6992-1 seems to cause a cutoff of the internal oscillator if the DS exceeds 0 or 100% by a large amount.....the LTC6992-2 doesn't ....experimentation of that would be interesting...

So what I would do now is play around with the input levels being careful not to exceed 1 volt at pin 1.........

Again the last thing I want is for Nigel to feel I'm saying his design is faulty and doesn't work....


Wayne



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M0VRF
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« Reply #47 on: May 04, 2018, 08:14:40 AM »

OK, here we go...

48V on Modulating FETs

Using 50:50 from the top of first image

1st image shows 50% duty cycle
2nd image shows sine in and out of modulator, nothing wrong here (ignore noise on waveforms, have used cursors for sine I/P)
3rd image shows symmetrical clipping when I/P is increased, OK, still 'normal'.

Using 40:60 from the top of second image

4th Image shows 40:60 duty cycle
5th image shows clipping of lower part of the O/P waveform.
6th image shows reducing the I/P to remove the clipping, the O/P clearly NOT making full V and therfore less than 100% mod.

The clipped O/P altho' taken from the filtered (unloaded hence the noisey waveform) PWM signal is present at the O/P of the LTC6992.
The FET driver circuit is fine but the LTC is NOT?

I'm at a loss...

I'd REALLY like the author to comment....

J.


* 50_50.jpg (270.76 KB, 800x1440 - viewed 235 times.)

* 60_40.jpg (279.07 KB, 800x1440 - viewed 234 times.)
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vk3alk
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« Reply #48 on: May 05, 2018, 10:06:45 PM »

Hi John

Sorry have been away from my Computer for a couple of days....

I have decided to build Nigel's Modulator just for a bit of fun...
Have ordered a LTC6992-1 but will take 5-10 days ... have already completed LPF and board design...

Will post pictures as I go along....

Better earn my stripes before I make too many comments...

Will have a look at your waveforms and have a think....


Wayne



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vk3alk
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« Reply #49 on: May 05, 2018, 10:30:39 PM »

Hmmm your right....
I quite like fault finding and probably muck around too much doing so.....
Having going TXs already takes the pressure off things a bit too when your R & D'ing.....

Well I would check both inputs into the IR2110 pins 10 and 12....
If the IR2110 is in a socket remove the IC.
Install the 2 poll filter as per that link....and check the waveforms particularly the lower one....
I'm looking for any clipping  Huh when you vary the Duty Cycle...

Looking at the Specs of the LTC6992 the output appears to be only 3.3 volts...that goes directly to pin 10...
The other input to pin 12 comes from the 2N7000 at 5 volts...
Cannot see this making any difference to the output goings on but things are getting desperate....
I use two 2N7000s driving the IR2110 ....each with its own pull up resistor ...one going to pin 10 the other pin 12.... so I know there at the same level....no reason I just do it that way...!!

Also again cannot see why it would make any difference but I drive the inputs at 12 volts with Pin 9 at 12 volts....as well....

Could you check the filtered waveforms at pins 10 and 12 and let us know how it goes....


Wayne

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