40 meter transmitter

[AB2EZ]

Jon

As a minor aside: You started out to build a "class C" transmitter. What you are really aiming for is something closer to "class D"... where the drain voltage waveform looks something like a square wave.  

Looking at the oscillator output waveform:

It is true that it is not symmetrical with respect to the time spent above its average value versus the time spent below its average value, but it is a lot more symmetrical than the gate waveform and the drain waveform.

One cannot tell, from the photos of the scope screen, what the voltage values are... but I would guess that moving the average value of the oscillator output waveform (i.e. the input to the IXYS chip) down by a fixed amount would improve things quite a bit. I.e. the  oscillator output voltage is above the threshold voltage of the IXYS chip even when it is well below its peak value.

You might be able accomplish this by reducing the supply voltage to the oscillator by placing one or two forward biased 1n4007 diodes in series, between the 5V voltage regulator and the V+ terminal of the oscillator. Each diode will drop the voltage being applied to the V+ terminal by approximately 0.7V.

Another approach that might provide an improvement (possibly in combination with the above) would be to add a capacitor (tack solder it in), in parallel with the existing 100 ohm load resistor on the output of the oscillator. A capacitor with value 220pf would roll off the existing high frequency (harmonic) components (above 7MHz) of the oscillator output waveform. This would make the time-varying part of the input waveform to the IXYS chip more sinusoidal... and that, combined with the average value (adjusted by the method described above) might result in a much better input waveform for the IXYS chip.


Another, more elegant approach would be to add a high speed comparator chip (+ and - analog inputs, TTL output) between the oscillator output (including the 220pF capacitor) and the IXYS input. By using a potentiometer between the 5V regulator output and ground, you could adjust the positive voltage applied to the "-" input of the comparator... and that would allow you to adjust the duty cycle of the 7MHz TTL rectangular wave output of the comparator.

Stu

Oscillator output.

It looks to me like everything is working fine, but I need to reduce the duty cycle.  

Steve: By looking at your VFO schematic, it looks like you do that using an inverting HEX buffer and a NAND chip?

Jon

[ka1tdq]

I actually have a 6 volt regulator in the oscillator right now.  It didn't change the power out from the 5 volt regulator, but I wanted to give it a shot.  I will put the 5 volt regulator back in and then try the diode trick.

I'll pick up a 220 pf cap tonight too.


Jon

[WD5JKO]

  
  I hope my posts concerning my class E testing adds to the thread because getting repeatable data is extremely difficult. Understanding what is necessary at 13.56 Mhz should make dealing with 7.150 Mhz easier. I very much want to see Jon get that 40m rig working as he intends it to be.

   Earlier this week I was debugging a second amplifier test bench. I was nervous about getting repeatable gate drive readings between the same amplifier at two separate test benches. I had the same probes (250 Mhz 100:1), but different model oscilloscopes.

   As I suspected there was about a 20% difference in the peak voltages observed. Then I fine tuned the probe compensation adjust with the scopes built in square wave calibration source. That did it, and the error is nil now.

   These run at 13.56 Mhz where 1 cycle is 74 ns. The FET's are driven with AC drive where the FET gate capacity is part of a high Q resonant circuit. The design is old, so 20 years ago this was pretty much all you could do..at this frequency and power.

   So if one cycle is 74 ns, then 1/2 cycle is 37 ns. These FET's have a VGS Threshold of about 3 volts, and are on pretty hard at 5 volts Vgs. Looking at the gate waveform (scope ground in the middle) we are above +5v for about     25 ns. The drain side is also resonant, but here this is class E. I include the drain side for reference.

Jim
Wd5JKO

[steve_qix]

Ok, good to see some scope pictures.

The oscillator output should be cleaner, and of course the on time should be adjustable.  Once you can get the input to the driver to look more like a square or trapezoid waveform, with the on-time lower than the off time, your gate waveform should improve quite a bit.  Aside from that, it looks as if the driver IC can drive the gate all ok.

The power output will increase dramatically once the on-time at the gate is less than the off-time.

Regards,  Steve

[ka1tdq]

I didn't do a calibration on the scope before I ran the tests.  I went to work early and just did these quick, few tests.  But, point taken, and these just got me a quick look into what was going on with the transmitter.

Despite the gimpy hand, I re-soldered things but I didn't see much difference.  Actually, when I tried the second diode in line after the 7805, I solder-bridged it and cooked it.

Plan B:

I thought about building a new analog crystal oscillator with a comparator afterward for duty cycle adjustment.  It would take time and money in parts to get it done right.  Instead, I've ordered an 8 MHz DDS VFO that produces square waves and I guess that the duty cycle is adjustable between 1 - 99 %.  It costs $40 from China.

Otherwise, a total oscillator rebuild will need to wait until I get my cast off.  Typing this message alone is taking forever.

Jon

[AB2EZ]

Jon

Hopefully you will heal quickly... which is obviously more important than debugging and completing the transmitter project.

Question: When you measured the "oscillator output" with the scope... was the scope probe connected to a point close to the oscillator output, or was the scope probe connected to a point close to the input of the IXYS driver?

As Jim (WD5JKO) has pointed out, there are some subtleties involved when measuring these waveforms on a transmitter that has very high, time varying currents (peak-to-peak values on the order of 5A, and fast rise and fall times with a 7MHz repetition rate) flowing around long paths. A long path, in this case, is: from the drain pin of the FET => the primary winding of the toroidal transformer => ground (via the B+ bypass capacitor => through the ground plane=> to the source pin of the FET.  I.e. there may be significant voltages induced around the loop formed by the probe and its ground wire, caused by the time vary magnetic fields passing through that loop... and there may be significant voltage drops in segments of the ground return path that are shared by the oscilloscope probe and these large currents. With a periodic waveform, I think these voltages are more of a concern than whether or not the probe is properly "compensated". With this periodic waveform, imperfect compensation of the probe will primarily result in a DC offset of the observed waveform.  In any event, the next time you use an oscilloscope to observe these waveforms... I suggest that you make sure that the ground wire/clip of the probe is connected to a ground point that is as close as possible to the point where the probe tip is connected (or directly to the ground pin on the device that the probe pin is connected to). You can also verify that you are not picking up too much induced voltage (from magnetic fields) by rotating the probe's ground wire to different positions... to see if the observed waveform changes.


Before disassembling the existing transmitter... I suggest that you try a few more, relatively easy things:

a. Install a new 7805 voltage regulator, and leave out the series diodes that I previously suggested. Replace the connection between the existing oscillator's output and the IXYS driver with a balanced twisted pair ... directly connected to the input and ground pins of the IXYS driver. Remove the existing 100 ohm terminating resistor, and replace it with a physically smaller 100 ohm resistor (0.5W or 0.25W is okay), connected with short leads, directly from the IXYS driver input pin to the IXYS driver ground pin. I.e. do not rely on a relatively long ground return path that passes through the ground plane. See if that has a favorable effect on the output power of the transmitter.

b. After observing the effect of a. (above), and in addition to what you have done in a. (above)... tack solder the previously mentioned (in my earlier post) 220pF capacitor (short leads) across the 100 ohm resistor. See if this provides any improvement in the output power.

c. Add in an adjustable, negative DC offset to the output of the oscillator... as follows:

i. On the oscillator board, remove the wire that goes to the input of the IXYS driver from the output bus of the oscillator. Insert a new .01uF capacitor between the output bus of the oscillator and the wire that goes to the input of the IXYS driver. Add a new 1000 ohm 1/2 watt or 1/4 watt resistor from the output bus of the oscillator, to the oscillator board ground.

The result of doing the above will be to "AC-couple" the oscillator output bus to the IYXS driver input... while still providing a 1000 ohm DC path between the oscillator output bus and ground.

This will result in an (approximately) 3V negative offset of the IXYS driver input waveform... versus what it was before.

ii. Connect a 1000 ohm potentiometer between your 5V DC supply and ground. Then connect the wiper of this potentiometer to one side of a 100 ohm series resistor. Then connect the other side of this 100 ohm series resistor to the point on the oscillator board where the new .01uF capacitor and the wire going to the input of the IXYS chip are connected together.

This will allow you to add a positive offset to the AC-coupled oscillator output waveform (i.e. the IXYS driver input waveform)... of between 0V and 2.5V. E.g. with the potentiometer wiper all the way to the + end, the combination of the new 100 ohm series resistor (connected to the wiper) and the existing 100 ohm load (between the IYXS driver input and ground) will form a voltage divider that adds half of the wiper voltage to the IXYS chip input waveform.

By adjusting the added positive  voltage offset, you should be able to shift the input waveform to the IXYS driver back up by enough to cause the IXYS driver to spend a roughly equal amount of time in the "low" output state and the "high" output state.

In the longer run... if you replace the oscillator:

Regardless of whether you use a comparator or not... I suggest that (after your recovery) you use balanced twisted pair to interconnect the new oscillator's output directly to the input of the comparator (if you decide to use one), and to connect the output of the comparator to the IXYS driver.

I didn't do a calibration on the scope before I ran the tests.  I went to work early and just did these quick, few tests.  But, point taken, and these just got me a quick look into what was going on with the transmitter.

Despite the gimpy hand, I re-soldered things but I didn't see much difference.  Actually, when I tried the second diode in line after the 7805, I solder-bridged it and cooked it.

Plan B:

I thought about building a new analog crystal oscillator with a comparator afterward for duty cycle adjustment.  It would take time and money in parts to get it done right.  Instead, I've ordered an 8 MHz DDS VFO that produces square waves and I guess that the duty cycle is adjustable between 1 - 99 %.  It costs $40 from China.

Otherwise, a total oscillator rebuild will need to wait until I get my cast off.  Typing this message alone is taking forever.

Jon

[ka1tdq]

I put a 7805 back in and ran twisted pair to the IXYS chip.  I also used a 1/4 watt capacitor with much shorter leads to the chip itself.  Before I soldered the new resistor on, I added a 220 pf capacitor across it.  And, I'm still getting roughly 7 watts.

Since then...

I've removed the oscillator board and made a new interface board for the DDS VFO.  It has a 5 volt regulator supply for the VFO and a circuit using a scroteful PNP to switch 13.8 volts to the IXYS chip.  Since the VFO puts out a constant signal, this seemed to be the best way to key the transmitter. 

I will run twisted pair to the TTL logic output of the VFO.  Here's a link for the VFO:

http://www.alibaba.com/product-detail/UDB1008-8Mhz-DDS-Signal-Generator-Board_1591644964.html

I may still hear the oscillator during receive, and I'll cross that bridge later.

Jon
KA1TDQ

[AB2EZ]

Jon

I'm "keeping my fingers crossed" that this will work for you.

As a review of some of your results to date:

1. When you observed the input to the IXYS driver with an oscilloscope, it wasn't half on and half off... but it was off a significant percentage of the time. [Since the use of a balanced twisted pair to connect the oscillator's output bus to the input of the IXYS driver didn't noticeably change the behavior of the circuit, one can assume that the waveform on the output bus of the oscillator is pretty much the same as what was on the input to the IXYS driver]

2. When you observed the FET's gate-to-drain waveform with an oscilloscope, it was high most of the time, with a short duration, high amplitude, downward-going pulse.

The above suggests that the IXYS driver was producing a low output state for a small portion of the time that the input to the IXYS driver was being driven "low". This further suggests that the waveform of the input of the IXYS is at too high a voltage when it is in its "low" state.

I suggest that you look for this problem with the new oscillator. The IXYS chip specification sheet says that it can accommodate an input voltage that is negative (-5V max), so there is no apparent risk in ensuring that the input to the IXYS driver is well below its threshold when you want its output to be low.

Stu

[ka1tdq]

Yeah, it's all about the input to the IXYS chip. I'm still waiting on the slow boat from China for the new oscillator/DDS VFO.

Specs show that output can be a square wave at any duty cycle. I will adjust that for best output power.  Also, output (no load) is 10 volts peak. I will adjust that to just turn on the IXYS (plus a little for margin).

The dc offset is also adjustable to +/-2.5 volts. I guess I would adjust that to ensure that the IXYS is off when it should be. I will need a scope to make all these adjustments.

I've thought about hearing the oscillator during receive. I will put a relay in to kill power to the DDS during receive. From what I've read, the VFO goes right back to where it was when powered off.  I will see...

Come on slow boat!

Jon
Sent from my iPhone while in line at Starbucks

[AB2EZ]

Jon

The DC offset will be particularly handy. I assume that the new oscillator requires both a "+" supply and a "-" supply in order to produce the DC offset. The IXYS should be easy to drive, since it presents a standard TTL load at its input. You want the "high" input to the IXYS driver to be around standard TTL high (i.e. 5V, which is well above the "on" threshold of the IXYS driver). You want the low input to be around 0 Volts (or maybe a little negative if needed to keep any ringing on the oscillator output waveform below the low threshold).

Stu

Sent from my radio room / office at home, where my beautiful wife Margaret limits me to one cup of coffee per day.

Yeah, it's all about the input to the IXYS chip. I'm still waiting on the slow boat from China for the new oscillator/DDS VFO.

Specs show that output can be a square wave at any duty cycle. I will adjust that for best output power.  Also, output (no load) is 10 volts peak. I will adjust that to just turn on the IXYS (plus a little for margin).

The dc offset is also adjustable to +/-2.5 volts. I guess I would adjust that to ensure that the IXYS is off when it should be. I will need a scope to make all these adjustments.

I've thought about hearing the oscillator during receive. I will put a relay in to kill power to the DDS during receive. From what I've read, the VFO goes right back to where it was when powered off.  I will see...

Come on slow boat!

Jon
Sent from my iPhone while in line at Starbucks

[ka1tdq]

The slow boat from China has arrived.

I've mounted the DDS VFO on the front of the transmitter and run twisted pair lead over to the input of the IXYS chip.  I'm using the output port of the DDS rather than the TTL output because I get no power out using TTL. 

The magic number seems to be 44% duty cycle, but I'm only getting 7 watts at that point.  Going down from there reduces power output.  Things get unstable going above that percentage duty cycle.  When I key the transmitter (apply power to the IXYS chip), the transmitter does key, but when I let up there is a higher power output.  This happens with no power applied to the IXYS chip.  To get rid of the output, I need to turn the VFO amplitude pot to zero and start again.

I'll need to take it to work this weekend so that I can throw a scope on it.

Jon
KA1TDQ

[ka1tdq]

I rebuilt the IXYS portion for the 3rd time.  Having the cast off of my hand helps a lot.  This time I ended up using an IXDD414 (just in case) and I also grounded the tab of the chip rather than insulating it from the heat sink.

The instability problem is gone.  However, power output isn't where it should be.  Power creeps up from about 5 watts at 44% duty cycle to 8 watts at 70%. 

With just a few switches, I can switch between my AM rig and this one for the antenna.  And a few switches can put the linear in or out.  With the linear I'm getting 90 watts with this rig.  I'm happy here.  I could troubleshoot more, but, eh...

It sounds nice on the receiver too and the frequency is spot on.  I'm waiting for my electronic keyer to come in the mail and I'll put it on the air.

Jon
KA1TDQ

[AB2EZ]

Jon

Congratulations (cast off, and rig working)!

What is the average drain current when the oscillator output duty cycle is 44% ?

Stu

[ka1tdq]

I don't have an easy way of measuring drain current.  It's on the same terminal connection as the IXYS feed and the power connection for the DDS VFO. 

I can measure total rig current though from the front panel of my 13.8v Astron power supply. 

At 44% Itotal = 2.5 amps = 5 watts
At 70% Itotal = 3.50 amps = 8 watts

I'm guessing the IXYS chip consumes about an amp and the VFO probably does too.  So, for 8 watts output, I'm burning 1.5 amps at 13.8 volts or 20.7 watts.

8 watts / 20.7 watts = 39% efficiency :-)

...of course, these are all guesses.  I would really need to put a current meter in line with the drain.

Jon
KA1TDQ

[ka1tdq]

One final note on this transmitter...

I've been talking with VK3ALK offline about this transmitter and he suggested that the 11N90 was a little too large of a FET for a low power rig.  He suggested replacing it with an IRF510 which has much lower gate capacitance.

I did and got a little more power at 10 watts out.  After that, I decided just to go ahead and bite the bullet and make this a genuine QRP rig.  I dialed down the duty cycle to 44% and that puts the output at just a hair over 5 watts. 

I also added cool blue LED lighting underneath the circuit board as you can see by the picture.  The green LED on the right of the circuit board is rectified RF coming off of the antenna jack.  This gives me a visual indication of actual RF output rather than throwing a wattmeter in-line.

So there it is... Left side of the desk is PW CW, and the right side is KW+ AM.

Jon
KA1TDQ