Single FET 40 meters

[WD5JKO]

  I agree with Joe. Let us know what happened...

The driver IC needs to be able to charge/discharge the FET gate capacitance very quickly, and the peak currents can be several amps. That said, the average current will be far less. So to do this the charge /discharge path must be a tight short, and low inductance path. So the driver chip needs good power across it's power pins. Something like a 10uf Tantalum in parallel with a 0.1 uf very short leaded capacitor would do. No need to run 4 awg jumper cables over to a car battery.

I am attaching the digital driver schematic used on the Retro-40. This might give you an idea or two to ponder.

The transistor is a 2N4401, and diodes are 1N4148

Jim
Wd5JKO

[AB2EZ]

Jon

You wrote: The bottom half of the sine wave would slam the output voltage to -5 vdc, but I guess that's ok for the IXDD.  It doesn't care if the input is -5 or 0 volts for "off."


No, that is not correct.

The output of the comparator will be one of the two standard TTL logic levels. Logical "low": between 0V and 0.4V. Logical "high": between 2.6V and 5V.

The reason for using a dual voltage supply (+5V and -5V) is so that the signal applied to the "+input" of the comparator can be a sine wave, whose values are both positive and negative. The "-input"  of the comparator should be connected to a small positive voltage relative to ground... for example: +0.1V obtained from the +5V supply by using a voltage divider between the +5V supply and ground. When the voltage applied to the "+input" (relative to ground) exceeds the voltage applied to the "-input" (relative to ground) ... for example: when the sine wave has a value that is greater than +0.1V... the output of the comparator will be TTL logical high. When the voltage applied to the "+input" is less than the voltage applied to the "-input"... for example, when the sine wave has a value that is less than +0.1V... the output of the comparator will be TTL logical low.

Since the input sine wave will be AC-coupled (i.e. via a capacitor) to the "+input"... and since there will be a 50 ohm non-inductive resistor between the "+input" and ground... removal of the sine wave (turning it off) will cause the "+input" voltage to go to 0V; and the output of the comparator to go to TTL logical low.

Stu

[ka1tdq]

That I can do.  Thanks for the oscillator picture too.  I'll just copy the Retro's oscillator and apply it to a comparator (with the .1 volt reference and 50 ohm resistor). 

I'm making a parts order to Digikey next week, so I'll tack on what I need.  The other stuff is heat-sink mount components. 

Thanks, I'll let you know how I make out!

Jon
KA1TDQ

[ka1tdq]

Update:  I built the oscillator board and I'm getting about a 1 volt pp which will be used to drive the comparator.  I will add a fixed and variable resistor to the comparator (-) input so that I can fine tune the reference for the duty cycle. 

Jon
KA1TDQ

[AB2EZ]

Jon

Good!

As a clarification:

In this case, is not necessary to have a 50 ohm swamping resistor at the point where the oscillator connects to the comparator. The 50 ohm swamping resistor (and an associated RF voltage divider/ RF power attenuator) is needed in the case where the RF source is the output of a transceiver or a transmitter that is designed to feed into a 50 ohm load. In this case, you can just connect the oscillator to the comparator with a twisted pair... one wire of which is connected to ground at the location of the oscillator and at the location of the comparator. Make sure that the oscillator is "AC-coupled" to the comparator. I.e. somewhere between the output of the oscillator and the "+input" of the comparator, there should be a capacitor in series. The capacitor can be located directly at the output of the oscillator or located directly at the "+input" of the comparator. A 0.001uF capacitor will be fine. The value is not critical. Looking at the picture you posted, you may already have an AC-coupling capacitor, in series, at the output of the oscillator. In that case, you don't need to add another capacitor.  

On the comparator side of the AC-coupling capacitor, place a resistor between the "+input" and ground. The value of this resistor should be around 1000 ohms. The value is not critical. The purpose of this resistor is to force the "+input" of the comparator to be at 0V relative to ground when the oscillator is turned off (i.e. not producing any RF output). This resistor will be part of the RF load on the oscillator output. A resistor having value of 1000 ohms should be no problem... but you could use a 10,000 ohm resistor instead.

When the comparator is powered on (i.e. when both the +5V and -5V supplies are present on the comparator's power pins) you can verify that the voltage between the "+input" pin of the comparator, and the comparator's ground reference, is a sine wave (not larger than 1V peak) when the oscillator is turned on, and 0V when the oscillator is turned off.  

Stu

[ka1tdq]

Progress update:  Oscillator board is done (left of the BNC connector) and the digital drive board connected to the gate is done too.  Blue connectors allow for unregulated power inputs of gnd, +5, -5, and +12 volts.

The PWM section is on top with another Radio Shack board that will sit on the right side of the FET.  That will be the PWM output board and I will get a PWM generator board from Steve to complete that area.

That leaves the power supply, PWM filter and output RF section.  Still a long way to go, but getting there.

Jon
KA1TDQ

[steve_qix]

.

[KF1Z]

You may already be planning it...

But you must have a heatsink for the IXYS driver IC.

it is going to get very hot at 40m operation.


Also, I see a lot of grease, but is the FQA11N90 insulated from the heatsink?
The the metal backing on that is connected to the drain, not source.

The big diode, and modulator mosfet would have to be insulated as well.

[ka1tdq]

There are mica insulators on the back of everything, so the drains and diode are insulated from ground. 

And actually this'll be used on 75 meters... the crystal is for 3.870 MHz.

Yeah, a heat sink for the IXDD...  didn't think of that.  It's an 8 DIP socket.  Is there a heat sink product out there for that? 

Jon

[KF1Z]

Oh, thought it was the normal to-220 package.
I didn't even look close enough to see there were no devices with 5 leads.

Yes, there are heatsinks for DIP packages...

http://www.digikey.com/product-search/en?pv357=307&pv357=249&FV=fff40012%2Cfff80068&mnonly=0&newproducts=0&ColumnSort=0&page=1&stock=1&quantity=0&ptm=0&fid=0&pageSize=25

I don't know how that one will act... I haven't tried one.
Though I suppose it should be the same.

When you DO build one for 40m, I would definitely use the to-220 package, so
you can attach it directly to the large heatsink.

[ka1tdq]

I had problems working with the digital drive and decided to give the analog drive a try.  You can see the schematic on the computer screen in one of the pictures along with the waveform at the gate.

I'm driving it on 40 meters with 4 watts and I'm getting about 8 volt pp.  L1 is calculated for 200 ohms Xl at 4.37uH.  T1 is on a FB43-1020 and is 5 turns primary to 1 turn secondary at the gate. 

I didn't get the class E waveform at the gate like I expected, and it was just a regular sine wave with negative excursions for half the wave. 

I have Transorbed the FET everywhere too so I'm safe for experimentation.

I'm not sure where to go from here.

Jon
KA1TDQ

[ka1tdq]

Here's a clearer picture...

[KF1Z]

no, you won't see a class-e waveform at the gate...
But the gate waveform will change when the fet is under load.


see picture... top right

http://classeradio.com/driver.htm

[ka1tdq]

Oh, ok.  I guess then that I need to work on getting at least 24 volts pp out of the transformer.  I'll tune L1 to resonate with the gate for max voltage and then adjust drive as necessary.

I haven't added the shunt capacitor yet, so I can experiment with class C first.  All I need to do is take the RF out of the output transformer.  I have a 130 volt DC supply and I'll just variac the input to that for the lower DC.  I'll start really low, around 12 volts, and work up to 35-45-ish. 

Jon
KA1TDQ

[ka1tdq]

Ok. I increased the drive to 10 watts.  I then kept pealing turns off the toroid until I ended up with 24 volts pp.  I wound up with just 10 turns on the T80-2, but I got there. 

Next, I'm going to hook this up to some DC and see what I get for RF output.  For a more compact unit, I could leave it class C (no need for variable capacitors and a coil).  I could use this to replace my single tube, low-level transmitter.

Jon
KA1TDQ 

[ka1tdq]

I found a junked 32 volt printer power supply to try the RF board out, and it puts out 22 watts.  Since this is configured for class C, I used a 1:2 output transformer at the drain of the FET.

I'm going to get an isolation transformer so that I'll have 130 volts-ish DC to play with and add a PWM.  I'm going to etch my own PWM output board for my customized setup, and I'll get the PWM generator board from Steve.

I'm going to need help designing the PWM filter though.  I haven't taken any measurements, but I did calculate once that this would consume .72 amps at carrier.  From there I haven't messed with any of the online filter calculators. 

Jon
KA1TDQ

[ka1tdq]

I decided to go with a traditional mod transformer design for this transmitter too.  I found an article on the web using a 120/40 volt power transformer as the mod transformer for a class D RF deck.  I've attached a picture showing the transformer with a negative peak limiter found on the AMwindow.

The other picture shows the transformer along with a negative peak limiter I've put together.  This circuit uses a jumper that I can take in/out for testing.  Also I've put in an LED to show if/when negative peaks show up.  The anode is connected to ground with the cathode connected to the mod transformer side going to the FET. 

I'm going to use a 30 volt transformer for the DC supply.  I will measure the DC voltage drop under heavy modulation and set the zener for 2 volts lower than that.  That should account for the .7 volt drop across the diode and any variance in zener voltage.

Jon
KA1TDQ

[AB2EZ]

Jon

The Antek transformer will saturate if you allow significant amounts of unbalanced DC to pass through it. I think the intent of the design you found on the web is to try to pass DC through both the primary and the secondary sides... in amounts that will balance out the DC magnetic field in the core. It's an interesting approach, if done right. It's not very energy efficient. The balancing current will dissipate power in a resistor, comparable to the average electrical power delivered to the RF stage. The resistor will also place a load on the audio amplifier that consumes as much power as will be consumed by the RF stage. If you don't include the balancing current on the primary side, the modulator will not work.

The negative peak limiter that you propose will make the audio amplifier very unhappy... because the amplifier is a voltage source that doesn't like to look into a short circuit.

Stu

[ka1tdq]

According to the schematic I found, it looks like only audio is passed through the 40 volt windings.  To keep things balanced, where does the other DC come from to keep things balanced?

If the negative peak limiter won't work, a least the diode to give an indication of a negative peak should be fine.  I would probably need to come up with another way to limit negative peaks.

Jon
KA1TDQ

[AB2EZ]

Jon

There are a variety of hypothetical modulator designs that endeavor to use DC flowing in an auxiliary winding to work around saturation of the mod transformer core resulting from the average current flowing into the modulated RF stage. Some of them won't work; and most of the rest will dump half of the DC power and half of the audio power into a resistor. Some designs will dump more DC power into a resistor; but will dump less audio power into that resistor. Some designs employ a reactor of sufficiently high inductance... to produce a sufficiently high impedance at audio frequencies... to avoid dumping DC power and audio power into a resistor. [These last designs can be compared to the modified Heising design... but they employ a separate, auxiliary, mod transformer winding]. All of those designs require the balancing current in the auxiliary winding to be adjusted to cancel out the magnetic field produced by the DC flowing into the modulated RF stage.

For the hypothetical design that I think you were looking at, B+ is connected to one side of the primary, and a resistor (roughly 16 ohms) is connected from the other side of the primary to ground. The direction of the DC in the primary has to be chosen to cancel the magnetic field produced by the DC flowing through the secondary. The value of the DC flowing in the primary has to be the value of the DC flowing in the secondary x the primary-to-secondary turns ratio. This also assumes the the output of the audio amplifier blocks DC.

If you wish to use a modulation transformer that cannot handle unbalanced DC (like the Antek transformer) you should use a "modified Heising" design. For your application you will need a 0.25H Heising reactor capable of handing 1.5A of current. You will also need a 100uF electrolytic capacitor rated at 450V.

Stu

[ka1tdq]

Modified Heising... got it!  I can do that, and thanks for the component values. 

I have the new schematic in the picture below.  As you mentioned before, this is assuming that the audio amp can handle the transformer load without coupling caps.

I've added the negative peak limiter/indicator around the choke now.  How does it look?

Jon
KA1TDQ

[AB2EZ]

Jon

On each side of the transformer (the primary side and the secondary side) the two available windings have to be wired in series or in parallel with the correct relative polarity. The placement of the dots in your schematic puts the two available windings on each side of the transformer in series opposition. I.e. current flowing through the series-connected input windings will produce magnetic fields that cancel. The output windings, as you have connected them, will produce equal and opposite voltages that cancel. The correct series interconnection would have the side of one coil that is marked with a dot connected to the side of the other coil that is not marked with a dot.

If the audio signal at the output of the transformer goes 2 volts more negative than: - (the DC supply voltage), the LED will instantly burn out (you will get one "negative peak" flash... and that will be it). The Zener diode will, as I stated previously, place a differential resistance (dv/di) of essentially zero ohms across the amplifier... and the amplifier will activate its automatic protection circuitry (or worse).

I suggest that you look up Steve's (WA1QIX's) approach to negative peak limiting, using 3 diodes.

http://www.amwindow.org/tech/htm/3diodeka.htm

In this application, the negative peak limiter's "keep alive" supply should have a value of 5V. The resistor, R1, ... which becomes the differential load on the modulated B+ line, when the diodes switch in the 5V keep-alive supply... should have a value (ohms) roughly equal to following:

R (modulation) = B+/I(carrier), where I(carrier) is the drain current that flows into the FET at carrier level.

For example, if the B+ is 30V and the drain current, at carrier, is 1A... then R(modulation) = 30V/1A = 30 ohms.

Separately, to be more precise about the values of the Heising choke and the Heising capacitor:

The value of the Heising choke should be roughly 0.25H x [R(modulation) / 50 ohms].

For example, if R(modulation) is 30V/1A, then the Heising choke should have a value of roughly 0.25H x 30 ohms/50 ohms = 0.15H.

The Heising choke should be rated to be able to support a current equal to (or greater than) I(carrier).

The value of the Heising capacitor should be roughly 100uF x 50 ohms/R(modulation).

If R(modulation is 30 ohms), then the capacitor's value should be roughly 100uF x 50 ohms / 30 ohms = 167uF.

Stu

[ka1tdq]

Very good stuff.  Thanks.  I'm sourcing all the parts now and will get back in the not-too-distant future.  

...and as for the placement of the dots and the phase relationship of the Antek transformer, I drew that schematic quickly and from memory just to represent the transformer.  I will place the winding in parallel and in phase like the original schematic shows.


Jon
KA1TDQ

[ka1tdq]

One more quick question.  I built the keep-alive circuit last night using diodes with values recommended in the article write-up.  However, is there any benefit to using a Fast Recover Epitaxial Diode as the series diode?  It has faster switching time and less loss, from what I gather.  Instead of a .7 volt drop going to the FET, I could use more voltage.  Or, does that mess up the negative peak limiter portion since there's a voltage drop intended for both sides of the series diode. 

I have an IXYS diode that I could easily put in there if there's any benefit.

Jon
KA1TDQ

[AB2EZ]

Jon:

I think that using a series diode with a lower forward voltage drop (v. a 1n4007) would be fine... provided it can handle the peak forward current.

Stu

One more quick question.  I built the keep-alive circuit last night using diodes with values recommended in the article write-up.  However, is there any benefit to using a Fast Recover Epitaxial Diode as the series diode?  It has faster switching time and less loss, from what I gather.  Instead of a .7 volt drop going to the FET, I could use more voltage.  Or, does that mess up the negative peak limiter portion since there's a voltage drop intended for both sides of the series diode.  

I have an IXYS diode that I could easily put in there if there's any benefit.

Jon
KA1TDQ