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Author Topic: Single FET 40 meters  (Read 40629 times)
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ka1tdq
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« on: April 02, 2014, 04:52:13 PM »

I managed to get my hands on a nice heat sink, metal chassis and 120 volt/12 amp transformer.  I also already have a couple FQA11N90's and just need to variable caps.  I've borrowed some ideas out there and put together this schematic for a class E single FET transmitter with external drive.  I used Xl (inductive reactance) numbers of 260 ohms for the input inductor and 450 ohms for the output series inductor. 

How far off am I?

Jon
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* Single FET 40 Meters.jpg (1793.68 KB, 3264x1836 - viewed 974 times.)
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« Reply #1 on: April 02, 2014, 05:55:32 PM »

Jon

I never tried using my 1-FET class E transmitter on 40m. However, I suggest that you use a toroidal transformer with only 1 turn on each side. [There is another way to feed the DC to the drain of the FET; but a 1:1 transformer will work fine.]

When you have four or six FETs in parallel, you need a 1:2 transformer to match the optimal load impedance of the FETs to the impedance looking into the tuned output circuit. But, with a single FET, a 1:1 transformer will provide the proper match.

More details:

The optimal RF load impedance for the FET(s) is approximately 0.5 x the drain voltage at carrier / the total drain current at carrier.

With four FETs in parallel, the total drain current is 4x the drain current of a single FET.

Therefore, with four FETs in parallel the optimal RF load impedance is 4x smaller; and you need the 1:2 step up transformer. [A 1:2 step up transformer provides a 1:4 impedance transformation]

Even more details:

If the drain-to-source voltage, at carrier, is 45V, and if the total drain current, at carrier, is 1.5A (corresponding to a single FET), then: 0.5 x 45V/1.5A = 15 ohms. This is approximately the load impedance that the FET needs to look into. The parallel combination of the adjustable loading capacitor and the 50 ohm output load produces an effective resistive load of approximately 15 ohms... to match the load that the FET needs to look into.

With four FETs in parallel (45V drain-to-source voltage, and 6A of total drain current at carrier), the optimal load impedance, that the parallel FETs need to look into, is approximately 0.5 x 45V/6A = 3.75 ohms. The 1:2 step up transformer converts this to 15 ohms... which is easier to match with the adjustable loading capacitor in parallel with a 50 ohm output load. E.g. it reduces the current in the output network's tuning inductor... which translates into reduced heating losses in the tuning inductor.

Stu
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« Reply #2 on: April 02, 2014, 06:11:46 PM »

Ok, 1:1 sounds good.  I'm trying not to get too complicated for my first rig.  I want to build something that actually works.  This approach uses minimal components with stuff I mostly have. 

I ordered the electrolytics yesterday for the power supply and I might put that together this weekend.  I found a massive commercially made isolation unit for 120 volts in a Goodwill store.  I figure I'll just rectify the output and get 120 vdc.  For testing the transmitter, I'll just use a tap from a lower electrolytic capacitor in the bank. 

Jon
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« Reply #3 on: April 02, 2014, 06:34:07 PM »

Jon

The 125pF capacitor should be placed between the drain and the source. It's purpose is to supplement the transistor's intrinsic drain-to-source capacitance (around 300pF) to produce a total capacitance that keeps the source-to-drain voltage from getting too large on peaks of the drain voltage waveform. For 40m operation, and a single FET, 125pF is about right.

Note that this capacitor needs to handle a lot of RF current. A doorknob type capacitor is what is typically used.

The bypass capacitor between the top side of the transformer and ground (where you currently have 125pF) needs to have a low impedance to ground at 7MHz. It should have a value of around 0.05uF or more, and rated at 400V or more. There are "orange drop" capacitors that can be used for that purpose.
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« Reply #4 on: April 02, 2014, 06:54:27 PM »

Okay, so the 125pf doorknob is essentially in parallel with the FET (one lead on the source and the other on the drain).  I understand that this is part of the resonant circuit supplementing the FET's internal capacitance.

 Then on top of the transformer where the HV DC comes in I need to put something around a .05uF.

Do I have that right, or am I having another GCE?  (GCE was on my Navy nuclear exams for "Gross Conceptual Error").

Jon
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« Reply #5 on: April 02, 2014, 07:32:40 PM »

Jon

Yes, you have it right, except I wouldn't describe the 125pF capacitor as "part of the resonant circuit".

For roughly half of each cycle (0.5 x 140ns): the FET is turned off. During that time in each cycle, current flows into the total drain-to-source capacitance and then back out again. Therefore, as a rough approximation, the capacitance is being charged for 1/4 of each cycle, and discharged in the next quarter of each cycle. Then the FET is turned on for half a cycle; and the capacitor remains discharged during that time.

The average value of this (time varying) current, during the portion of each cycle that the drain-to-source capacitance is charging, is roughly equal to the overall average drain current: 1.5 ampere (at carrier).

The charge (Q) that accumulates on this capacitance during each charging (quarter) cycle is: 0.25 x 140ns x 1.5A = 52.5 nC. (i.e. 52.5 nanocoulombs)

But: Q = CV, and C= Q/V

If (conservatively) we want to keep the peak drain-to-source voltage (at carrier) below 12.5% of the 900V rating of the FET (to ensure that the peak drain-to-source voltage, on 100% modulation peaks, is less than 25% of the 900V rating of the FET), i.e. 112.5V, then we need to make sure that the capacitance is larger than 52.5nC /112.5V = 466pF.

Therefore we need a total drain-to-source capacitance (including the 300pF intrinsic drain-to-source capacitance of the FET + the supplementary drain-to-source capacitance) of 466 pF

A supplementary capacitor having value 125pF is close enough (-:

Stu


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« Reply #6 on: April 02, 2014, 09:35:01 PM »

Jon:

I built a couple of these years ago:

http://www.its.caltech.edu/~mmic/reshpubindex/papers/QST.pdf

I now believe in push-pull as the derived output waveform is closer to a sinewave than a single ended one.

73,
Dan
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« Reply #7 on: April 03, 2014, 01:21:04 AM »

Stu has a lot of very good advise.

Make sure the leads from the shunt capacitor (your 125pF cap) are SHORT and HEAVY.  Otherwise, there will be ringing in that part of the circuit.  The cap has to be a good one.  Not all doorknobs are created equal.  Some (probably the majority) are actually pretty poor.  Trust me, I've done a *LOT* of experimenting with shunt capacitors over the past 15 years or so with class E rigs.  Multilayer ceramic capacitors work much better in the shunt cap application (assuming the cap is rated at the current you are running).  Just make sure the capacitor is rated at the current you are going to run.  Since this is a fairly low power affair, you're probably ok with most doorknobs.  As the power goes up, MLC caps are a better choice.

------>>>  Important:  You should have a transzorb from gate to ground.  A 1.5ke18ca will do it.  Otherwise you stand a very great chance of blowing the MOSFET by exceeding the gate voltage, even for a nanosecond.  That's all it takes to punch through the gate and it happens all the time with analog drive for a variety of reasons.

40 meters has been pretty good lately with good activity around much of the time.
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« Reply #8 on: April 03, 2014, 09:06:27 AM »

Short leads on the MLC shunting capacitor and a transzorb on the gate... got it!  I'll also use a variac on my power supply to bring things down to testing level. 

I have two crystals now that I can use on 40 meters, 7.289 and 7.294 MHz. I'll be back on the air after my antenna switch comes in next week.  I found out that my transmit dipole receives much better than my receive antenna, despite all efforts to bring it up to snuff.  Now I'll have a TX/RX switch and an antenna switch to move during QSO's.  The sequence is very important not to get wrong. 

Jon
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« Reply #9 on: April 12, 2014, 01:01:04 AM »

Making progress.  The chassis seen in the picture will house the rig along with a PWM.  The single FET is an FQN11N90 and the top rail will be ground for the modulator 2 FETs.

The electrolytic board is for the rectified 120 vac from a huge isolation transformer.  I will cut down the coil to about 9.6uH to form the series inductor on the output. 

I'm going to a hamfest tomorrow to look for a HV 300pf variable.

Jon
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* 20140411_215436.jpg (2014.42 KB, 3264x1836 - viewed 727 times.)
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« Reply #10 on: April 16, 2014, 09:55:20 AM »

What would be the approximate value to use for an FQA11N90's gate capacitance at 40 meters?  I'm trying to calculate the series inductor value to use with an analog drive.  The datasheet says 2700pf @ 1.0 MHz, but this value seems a little high.  I'm going to use a T80-2 toroidal core for the series inductor.

Also, copying someone else's work, should I stick with a 10:2 transformer on the input using an FB43-1020 on 40 meters rather than on 75?  He used 5 turns to 1 (1 turn going on the gate). Should I cut that back to maybe 4 turn to 1 for 40 meters?

This weekend I'm going to start tap/die parts to the heat sink and begin soldering.  I want to eliminate as much guesswork and experimentation as possible.

Jon
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« Reply #11 on: April 16, 2014, 10:51:20 AM »

Jon

If you are going to use a toroidal transformer to drive the gate of a single FQA11N90, then you should model the gate input impedance as approximately 3000pF and series with 2 ohms of resistance.

You will need to add a series inductor whose impedance at your chosen frequency of operation is approximately equal (but opposite in sign) to that of the 3000pF of gate-to-source capacitance. At 7.3MHz, the impedance of the gate-to-source capacitance is approximately -j7.26 ohms. Therefore, for operation at 7.3MHz, you will need approximately 158nH of series inductance. If the inductor is placed on the input side of a 5:1 input transformer, then you will need 25 x 158nH = 3.95uH of inductance

If the impedance of the inductor cancels the impedance of the gate-to-source capacitance, then you will be left with the 2 ohms of series resistance. The 5:1 (or 10:2) toroidal transformer will step this up to around 50 ohms.

The output voltage of the toroidal transformer (driving the gate of the FET) will be (1/5) x the input voltage to the toroidal transformer. You need a 10 volt (peak) sine wave from gate-to-source of the FQA11N90.

However, because the gate-to-source voltage is the voltage across the gate-to-source capacitance in series with 2 ohms of resistance; and because of the Q of the resonant input circuit (including the inductor): the voltage from gate-to-source of the FQA11N90 is V x (1/5) x Q; where V is the amplitude of the sine wave applied to the input side of the circuit (including the series inductor and the 5:1 transformer), 1/5 is the transformer's turns ratio, and Q is around 7.26 ohms/2 ohms. Therefore, you will require V= 10 volts x 5 /Q = 13.8V.

At 50 ohms impedance ratio, this corresponds to 1.9W of drive power.

As an alternative, you can drive the FQA11N90 with an IXYS IXDD414. This driver chip can be placed in close proximity to the FQA11N90.

http://www.classeradio.com/driver.htm

The advantages are:

The IXYS chip is designed to produce its output voltage into a high capacitance load (like the FQA11N90's gate-to-source capacitance)... and its output voltage will have a faster rise time (crossing the 4V off-to-on gate voltage threshold of the FQA11N90) than a 7.3MHz sine wave... which is highly desirable in this application.

The IXYS chip can be driven by a CMOS logic gate or by a sine wave + a 1.25VDC offset. The input to the IXYS chip need not deliver a lot of current, because the input capacitance of the IXYS chip is the same as that of a standard CMOS logic chip.

Good luck
Stu

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« Reply #12 on: April 16, 2014, 11:45:01 AM »

Thanks for the detailed explanation.  3.95uH of inductance is easy to get from a T80-2 and I can put a few more turns on, then back off a few to get resonance.  And I think I will stick with the analog drive for simplicity.  My current exciter only puts out 4 watts, but I can at least tune for the peak using it until I get a nice commercial rig with adjustable drive.  I can then adjust excitation until I get the proper 10+ volt peak at the gate.

Besides, the circuit we're talking about is too elegant not to use.  To get the matching gate drive with a corresponding 50 ohm match with two components just seems right. 

...and, transzorb the gate so as not to punch a hole through it.

Jon
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« Reply #13 on: April 16, 2014, 12:21:50 PM »


Jon,

   Be very careful with that analog drive. This is not something you can raise up from zero to the desired level. If you do, the FET will go through the linear region, and the result will be high dissipation. Prolong that for more than an instant, and the fet goes south to dead fet heaven.

   We repair commercial 3KW 13.56 Mhz class E amplifiers here. These use RF drive with a tuning adjustment to get ~ 13v + peak to each of two parallel connected FET gates. Had a new guy that mistook 13v peak as 13v peak to peak. Two $70 Fet's made a nice thunk-thunk as they hit the bottom of the trash can.

   I wonder if a Retro-40 (Small Wonder Labs) transceiver would be a good candidate as a driver? These use a class D Fet output with digital drive.....The Xmitter is OFF/ON, no in-between..

Regards,
Jim
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« Reply #14 on: April 16, 2014, 12:40:20 PM »

How about this as a driver?  It's just a CMOS inverter/oscillator before a digital drive chip.

Jon


* FET driver-oscillator.jpg (1784.06 KB, 3264x1836 - viewed 783 times.)
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« Reply #15 on: April 16, 2014, 12:43:21 PM »

I would expect the digital drive to be simpler.   Very low drive impedance and of course very broadband.  I would imagine that the limiting factor as far a frequency goes would be when you run out of current to charge and discharge the gate capacitance of the FET.  With the gate capacitance a low impedance current source and sink is required which the digital driver provides.  In going from 75 to 40 meters on a multiple FET design, you will likely be able to drive less FET's with a single digital driver when compared to 75M.  Since your only driving a single FET a single digital driver should be extremely simple.  

I believe the driver chips are TTL levels, but have not researched all of the devices available.  

Joe, W3GMS  
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« Reply #16 on: April 16, 2014, 01:08:07 PM »

I have never looked at the input spec's of the digital driver chip.  You may have to use a buffer amp between your cmos oscillator and the drive chip.  That certainly is no big deal though! 

Joe, GMS       
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« Reply #17 on: April 16, 2014, 01:10:06 PM »


Must also insure that the FET receives a logic zero at the gate when the crystal is pulled.
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« Reply #18 on: April 16, 2014, 01:47:09 PM »

I didn't see any specs on the IXDD614 datasheet, but I'm willing to bet that the input impedence is very high. If need be, I can add a voltage follower in between.

I was checking out threads on the Class E forum and I noticed that someone had a rippled waveform going into the gate and the problem turned out to be a voltage regulation issue on the 12 volts for the IXDD.  I will probably use a car battery to supply the digital drive for testing and simplicity. 

Jon
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« Reply #19 on: April 16, 2014, 05:50:40 PM »

Also have a look at Jay's (W1VD) website...
Yes it's Class-D, but the driver section is the same as for Class-E

http://www.w1vd.com/375wattclassD.html

in one link he has a VFO design, that will directly drive the IXDD614's in the RF deck

"digital drive" makes things a bit easier... and much less worry about the more likely parasitics
that can happen with analog drive....

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« Reply #20 on: April 16, 2014, 06:02:56 PM »

Yeah, I'm definitely going with the digital drive.  I've seen that VFO schematic but I think that I'm going to stick with the crystal oscillator design.  Also I'm going to switch gears and make this a 75 meter class E rig.  I do have a crystal for 3870 (the west coast AM frequency). 

Everything for the digital drive will fit on a Radio Shack circuit board.  I've attached a picture and it shows the 5 volt and 12 volt regulator, CMOS hex inverter, voltage follower and IXDD614.  It will mount right next to the single FET.

This rig will only be 35 watts-ish but would be great for SOTA activations.  Lots of mountains around here.

Jon
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* Drive Circuit Board.jpg (1891.39 KB, 3264x1836 - viewed 586 times.)
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« Reply #21 on: April 19, 2014, 01:15:38 AM »

That circuit with the crystal oscillator didn't work too well so I'm back to analog drive for 40 meters.  I've got the layout for the heat sink done with the modulator FETs on top and the FQA11N90 on bottom.  A BNC jack takes the RF drive and sends it through the T80-2 and FB-43-1020 to the gate. 

I need to make a DigiKey order for the components that will be associated with the FETs. 

Jon
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* 20140418_220503.jpg (1918.13 KB, 3264x1836 - viewed 724 times.)
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« Reply #22 on: April 19, 2014, 10:19:18 AM »

Here is just one example of a high speed comparator (about 10ns switching time) that accepts an analog input and provides TTL output (to drive the IXYS chip), and comes in a DIP package.

http://datasheets.maximintegrated.com/en/ds/MXL1016.pdf

I used a comparator like this (I don't remember the part number of the particular comparator I used), with a dual voltage power supply (+5V and -5V), in the last version of my single FET 75 meter class E transmitter.

The sine wave input to the comparator could be as little as 10mV in amplitude (i.e. 1 microwatt into the 50 ohm non-inductive swamping resistor that I used as a termination at the input to the comparator); although I used around 100mV (0.1 milliwatt into the 50 ohm swamping resistor) from the unmodulated, low power RF output of my Flex Radio SDR-1000.

Be careful not to use too large a signal at the input to the comparator. For example, if you use a 1W input signal (10V amplitude into 50 ohms)... you will need to employ a low power resistive voltage divider at the input to the comparator to keep the input voltage below around 1V peak.

The TTL output of the comparator was a decent square wave when I used either a 3.8MHz or a 7.3MHz input.

In summary: the RF signal source provides a 100mV (value not critical) sine wave to the comparator => the comparator provides a TTL square wave to the IXYS chip => the IXYS chip drives the gate of the FQA11N90.

Stu
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« Reply #23 on: April 19, 2014, 12:18:34 PM »

That circuit with the crystal oscillator didn't work too well so I'm back to analog drive for 40 meters.  I've got the layout for the heat sink done with the modulator FETs on top and the FQA11N90 on bottom.  A BNC jack takes the RF drive and sends it through the T80-2 and FB-43-1020 to the gate. 

I need to make a DigiKey order for the components that will be associated with the FETs. 

Jon
KA1TDQ


Jon,

Its very important for your learning curve to find out why something does not work.  Just switching topologies when the other one did not work leaves you with nothing learned.  Look at the circuit and find out why it did not work.  When you have your answers, then you will be in a much better position to make a decision on what way you want to go. 

We all know that digital drive is a very proven technique and it works very well.   

Joe, GMS   
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« Reply #24 on: April 19, 2014, 01:30:56 PM »

I like the idea of using a voltage comparator with a small sine wave. The reference voltage would be ground and I would need a + and - 5 volt source.  The bottom half of the sine wave would slam the output voltage to -5 vdc, but I guess that's ok for the IXDD.  It doesn't care if the input is -5 or 0 volts for "off."

I'll try that... thanks!  I can use the BNC that I've already soldered on the board to input the oscillator waveform to the comparator. 

I built the circuit I mentioned a few replies ago and the oscillator would change frequency a lot simply by touching it. 

Jon
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* 20140419_102640.jpg (2206.86 KB, 3264x1836 - viewed 600 times.)
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