Refer to the Modulator Schematic... The modulator shown in the schematic is used with a 200 watt class E RF amplifier. The principle is applicable to other transmitters and designs. This one is just one working example. The modulator is a source-follower series modulator which is operated nearly at saturation when the transmitter is producing only a carrier. This results in a low voltage drop across the primary modulator transistor (Q2), and consequently low dissipation and power loss in the device. The drain voltage of Q2 is fed through a diode from the carrier power supply. This supply is typically between 5 and 10 volts higher than the desired output voltage at carrier. Transistor Q1 is operated at cutoff when the transmitter is producing only a carrier.
Since Q2 is a source-follower, the voltage appearing at the source of the transistor follows the gate voltage. The gate voltage is set such that the output of Q2 is approximately 40 volts (in this example). This is the carrier DC voltage. The 100 Ohm 5W resistor between the gates of Q1 and Q2 is set such that Q1 is just at cutoff (no current at carrier). Notice that the gate voltage of Q1 is fed through a diode, and therefore will only be driven positive when the output of the IRF610 audio amplifier exceeds the voltage being fed to Q2 through the 200V 10A series diode to the carrier power supply. Otherwise, Q1 is simply cut off and no current flows though the device.
During the negative portion of the modulating waveform, the voltage fed to the gates by the IRF610 voltage amplifier drops, and transistor Q2 acts as a normal source follower series modulator. Voltage is fed to Q2 from the carrier power supply through the 200V 10A series diode. The diode feeding the gate of Q1 is back-biased, Q1 is completely cut off and effectively out of the circuit.
During the positive portion of the modulating waveform, the voltage fed to the gates of Q1 and Q2 rises. The series diode feeding the gate of Q1 will begin to conduct, the gate voltage of Q1 will begin to rise, and current will flow from the 100V positive peak power supply through Q1 to the drain of Q2. At the same time, the voltage being fed to the gate of Q2 is also rising. Since the drain voltage of Q2 is being increased at the same rate as the gate voltage, Q2 never actually saturates. Q2 is the primary modulating device. Q1 simply supplies additional drain voltage to Q2 as the output voltage increases. It is important to note that during positive peaks, the 200V 10A diode between the drain of Q2 and the carrier power supply is back biased. No current flows from the carrier power supply at this time, and the supply is effectively switched out of the circuit.
The additional voltage supplied by T2 and the diode ring D1-D4 is necessary because FETs have a threshold voltage. This is typically about 5 volts. So, the gates of Q1 and Q2 must be approximately 5 volts higher than the desired source voltage. Without the additional voltage available, it would not be possible to achieve the maximum positive peak capability of the modulator. The voltage regulator keeps the carrier level constant despite power supply sag (because the positive peak supply is not loaded) or small changes in line voltage. The regulator feeds voltage to the IRF610 voltage amplifier and not the entire modulator.
The 2n2219 soft start transistor is necessary to prevent transmit-receive switching problems. Without this circuit, the modulator would, for some finite period of time, feed the full positive peak power supply voltage to the RF amplifier. With the soft-start circuit, when the modulator is in stand-by, no voltage flows to the base of the 2n2219, which allows the collector voltage to rise. This voltage is fed to the non-inverting input of the driver op-amp, which drives the gate of the IRF610 voltage amplifier positive - turning the transisitor on and reducing the gate voltage of Q1 and Q2 to a low value. When the modulator is switched into operation, the 2n2219 is turned on, and the collector voltage falls to approximately .7 volts. This will discharge the 3.3uF capacitor through the 10K resistor connected to the collector. Once the voltage across the capacitor falls, the modulator will produce a normal output.
Also note the three-diode negative peak limiter, which is part of the design.
The latest version of the Modulator schematic has been updated to show the complete power supply including the overload system, transformer data and voltage ranges which will work.
I hope this explanation is helpful :-). Let me know if something needs work! Please email comments, etc. to: stevec@netway.com